UniPhier ARM SoC DT updates for v4.21
- Add bindings for all SoCs/boards of UniPhier platform - Move binding docs to socionext directory - Add all CPUs in cooling maps - Add MIO DMAC nodes -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJcDpUOAAoJED2LAQed4NsGF5UP+QFPDavs9f3HYR+WJIP9FAk/ yztsRuaygRuJdGwi7xHw1fDdi5N5u4O5olDTiULYDxd+GjlCgbgXB9MKLoVktB0z 81MvrcAsh4d/NvU22R2QadsbeQdGLPRlfyRtwxi0DPzx/LAvUEGA29rFF4fTqYXw 4Lm8UVJl+3yyfl8ysVHhgALmgwYGG/oC9wF/b2Y2/KuO6qm68yxYPX952G3j/AaH HXiWXdQzkYAP7nND8VcN8KBnlV/lJH/HanYVFgWzpV6Kwo7sUbNdMssePZQSsr+J 6Fl36/VtzGTeUlP3tX07Hu4v1i4V09kmG3TLAB6XsIAohpq0g9LRGSrVIohShZGE lNiv2qrXUHUHBq+UoJQDjD/QEvaLTEo3g7S8hWBnPgMyPF8CyMsUYs6EhOuIiinM wtwtAE/EmigvY4xbElJG2WQ/svJmd3qrMazqot8nzPnIKz0FtMmA4jqAyhlmAs3K grH4hG5G0THpX2Netei1mCfb060CMvlabWRFZNjaFk6oxQN4n1J0AUXGeFiHK2Eg FkkVp5PiEg2dn1lhLiUyeauOVzrUKum2CBrLO9war4GLHaUynu4/8ZP+fVgJa3gb DMUh+j4ky/+iZcB5id59OIpALVZvpFk6FfgpFN5d2x4LpRmd1M0oPi+K9FYrmIQb kDx41tyCAx9npRmYN979 =zPKy -----END PGP SIGNATURE----- Merge tag 'uniphier-dt-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt UniPhier ARM SoC DT updates for v4.21 - Add bindings for all SoCs/boards of UniPhier platform - Move binding docs to socionext directory - Add all CPUs in cooling maps - Add MIO DMAC nodes * tag 'uniphier-dt-v4.21' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier: ARM: dts: uniphier: add MIO DMAC nodes arm64: dts: uniphier: Add all CPUs in cooling maps ARM: dts: uniphier: Add all CPUs in cooling maps dt-bindings: uniphier: move cache-uniphier.txt to vendor directory dt-bindings: uniphier: add bindings for UniPhier SoC family Signed-off-by: Olof Johansson <olof@lixom.net>
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@ -0,0 +1,47 @@
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Socionext UniPhier SoC family
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-----------------------------
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Required properties in the root node:
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- compatible: should contain board and SoC compatible strings
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SoC and board compatible strings:
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(sorted chronologically)
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- LD4 SoC: "socionext,uniphier-ld4"
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- Reference Board: "socionext,uniphier-ld4-ref"
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- Pro4 SoC: "socionext,uniphier-pro4"
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- Reference Board: "socionext,uniphier-pro4-ref"
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- Ace Board: "socionext,uniphier-pro4-ace"
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- Sanji Board: "socionext,uniphier-pro4-sanji"
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- sLD8 SoC: "socionext,uniphier-sld8"
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- Reference Board: "socionext,uniphier-sld8-ref"
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- PXs2 SoC: "socionext,uniphier-pxs2"
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- Gentil Board: "socionext,uniphier-pxs2-gentil"
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- Vodka Board: "socionext,uniphier-pxs2-vodka"
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- LD6b SoC: "socionext,uniphier-ld6b"
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- Reference Board: "socionext,uniphier-ld6b-ref"
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- LD11 SoC: "socionext,uniphier-ld11"
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- Reference Board: "socionext,uniphier-ld11-ref"
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- Global Board: "socionext,uniphier-ld11-global"
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- LD20 SoC: "socionext,uniphier-ld20"
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- Reference Board: "socionext,uniphier-ld20-ref"
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- Global Board: "socionext,uniphier-ld20-global"
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- PXs3 SoC: "socionext,uniphier-pxs3"
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- Reference Board: "socionext,uniphier-pxs3-ref"
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Example:
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/dts-v1/;
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/ {
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compatible = "socionext,uniphier-ld20-ref", "socionext,uniphier-ld20";
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...
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};
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@ -2247,6 +2247,7 @@ M: Masahiro Yamada <yamada.masahiro@socionext.com>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier.git
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S: Maintained
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F: Documentation/devicetree/bindings/arm/socionext/uniphier.txt
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F: Documentation/devicetree/bindings/gpio/gpio-uniphier.txt
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F: Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.txt
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F: arch/arm/boot/dts/uniphier*
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@ -235,6 +235,16 @@ peri_rst: reset {
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};
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};
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dmac: dma-controller@5a000000 {
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compatible = "socionext,uniphier-mio-dmac";
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reg = <0x5a000000 0x1000>;
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interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>,
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<0 71 4>, <0 72 4>, <0 73 4>;
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clocks = <&mio_clk 7>;
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resets = <&mio_rst 7>;
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#dma-cells = <1>;
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};
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sd: sdhc@5a400000 {
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compatible = "socionext,uniphier-sd-v2.91";
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status = "disabled";
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@ -246,6 +256,8 @@ sd: sdhc@5a400000 {
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clocks = <&mio_clk 0>;
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reset-names = "host", "bridge";
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resets = <&mio_rst 0>, <&mio_rst 3>;
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dma-names = "rx-tx";
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dmas = <&dmac 4>;
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bus-width = <4>;
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cap-sd-highspeed;
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sd-uhs-sdr12;
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@ -263,6 +275,8 @@ emmc: sdhc@5a500000 {
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clocks = <&mio_clk 1>;
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reset-names = "host", "bridge", "hw";
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resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
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dma-names = "rx-tx";
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dmas = <&dmac 6>;
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bus-width = <8>;
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cap-mmc-highspeed;
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cap-mmc-hw-reset;
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@ -269,6 +269,16 @@ peri_rst: reset {
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};
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};
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dmac: dma-controller@5a000000 {
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compatible = "socionext,uniphier-mio-dmac";
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reg = <0x5a000000 0x1000>;
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interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>,
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<0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>;
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clocks = <&mio_clk 7>;
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resets = <&mio_rst 7>;
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#dma-cells = <1>;
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};
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sd: sdhc@5a400000 {
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compatible = "socionext,uniphier-sd-v2.91";
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status = "disabled";
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@ -280,6 +290,8 @@ sd: sdhc@5a400000 {
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clocks = <&mio_clk 0>;
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reset-names = "host", "bridge";
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resets = <&mio_rst 0>, <&mio_rst 3>;
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dma-names = "rx-tx";
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dmas = <&dmac 4>;
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bus-width = <4>;
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cap-sd-highspeed;
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sd-uhs-sdr12;
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@ -297,6 +309,8 @@ emmc: sdhc@5a500000 {
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clocks = <&mio_clk 1>;
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reset-names = "host", "bridge", "hw";
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resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
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dma-names = "rx-tx";
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dmas = <&dmac 5>;
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bus-width = <8>;
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cap-mmc-highspeed;
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cap-mmc-hw-reset;
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@ -313,6 +327,8 @@ sd1: sdhc@5a600000 {
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clocks = <&mio_clk 2>;
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reset-names = "host", "bridge";
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resets = <&mio_rst 2>, <&mio_rst 5>;
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dma-names = "rx-tx";
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dmas = <&dmac 6>;
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bus-width = <4>;
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cap-sd-highspeed;
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};
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@ -141,8 +141,10 @@ cpu_alert: cpu-alert {
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cooling-maps {
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map {
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trip = <&cpu_alert>;
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cooling-device = <&cpu0
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THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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};
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};
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@ -239,6 +239,16 @@ peri_rst: reset {
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};
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};
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dmac: dma-controller@5a000000 {
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compatible = "socionext,uniphier-mio-dmac";
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reg = <0x5a000000 0x1000>;
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interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>,
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<0 71 4>, <0 72 4>, <0 73 4>;
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clocks = <&mio_clk 7>;
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resets = <&mio_rst 7>;
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#dma-cells = <1>;
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};
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sd: sdhc@5a400000 {
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compatible = "socionext,uniphier-sd-v2.91";
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status = "disabled";
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clocks = <&mio_clk 0>;
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reset-names = "host", "bridge";
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resets = <&mio_rst 0>, <&mio_rst 3>;
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dma-names = "rx-tx";
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dmas = <&dmac 4>;
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bus-width = <4>;
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cap-sd-highspeed;
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sd-uhs-sdr12;
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clocks = <&mio_clk 1>;
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reset-names = "host", "bridge", "hw";
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resets = <&mio_rst 1>, <&mio_rst 4>, <&mio_rst 6>;
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dma-names = "rx-tx";
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dmas = <&dmac 6>;
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bus-width = <8>;
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cap-mmc-highspeed;
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cap-mmc-hw-reset;
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@ -206,13 +206,10 @@ cpu_alert: cpu-alert {
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cooling-maps {
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map0 {
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trip = <&cpu_alert>;
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cooling-device = <&cpu0
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THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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map1 {
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trip = <&cpu_alert>;
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cooling-device = <&cpu2
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THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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};
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};
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};
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