i2c: mv64xxx: The n clockdiv factor is 0 based on sunxi SoCs
According to the datasheets the n factor for dividing the tclk is 2 to the power n on Allwinner SoCs, not 2 to the power n + 1 as it is on other mv64xxx implementations. I've contacted Allwinner about this and they have confirmed that the datasheet is correct. This commit fixes the clk-divider calculations for Allwinner SoCs accordingly. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Olliver Schinagl <oliver@schinagl.nl> Signed-off-by: Wolfram Sang <wsa@the-dreams.de> Cc: stable@kernel.org
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@ -146,6 +146,8 @@ struct mv64xxx_i2c_data {
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bool errata_delay;
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struct reset_control *rstc;
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bool irq_clear_inverted;
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/* Clk div is 2 to the power n, not 2 to the power n + 1 */
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bool clk_n_base_0;
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};
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static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_mv64xxx = {
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@ -757,25 +759,29 @@ MODULE_DEVICE_TABLE(of, mv64xxx_i2c_of_match_table);
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#ifdef CONFIG_OF
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#ifdef CONFIG_HAVE_CLK
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static int
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mv64xxx_calc_freq(const int tclk, const int n, const int m)
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mv64xxx_calc_freq(struct mv64xxx_i2c_data *drv_data,
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const int tclk, const int n, const int m)
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{
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return tclk / (10 * (m + 1) * (2 << n));
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if (drv_data->clk_n_base_0)
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return tclk / (10 * (m + 1) * (1 << n));
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else
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return tclk / (10 * (m + 1) * (2 << n));
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}
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static bool
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mv64xxx_find_baud_factors(const u32 req_freq, const u32 tclk, u32 *best_n,
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u32 *best_m)
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mv64xxx_find_baud_factors(struct mv64xxx_i2c_data *drv_data,
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const u32 req_freq, const u32 tclk)
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{
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int freq, delta, best_delta = INT_MAX;
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int m, n;
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for (n = 0; n <= 7; n++)
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for (m = 0; m <= 15; m++) {
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freq = mv64xxx_calc_freq(tclk, n, m);
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freq = mv64xxx_calc_freq(drv_data, tclk, n, m);
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delta = req_freq - freq;
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if (delta >= 0 && delta < best_delta) {
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*best_m = m;
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*best_n = n;
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drv_data->freq_m = m;
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drv_data->freq_n = n;
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best_delta = delta;
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}
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if (best_delta == 0)
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@ -813,8 +819,11 @@ mv64xxx_of_config(struct mv64xxx_i2c_data *drv_data,
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if (of_property_read_u32(np, "clock-frequency", &bus_freq))
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bus_freq = 100000; /* 100kHz by default */
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if (!mv64xxx_find_baud_factors(bus_freq, tclk,
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&drv_data->freq_n, &drv_data->freq_m)) {
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if (of_device_is_compatible(np, "allwinner,sun4i-a10-i2c") ||
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of_device_is_compatible(np, "allwinner,sun6i-a31-i2c"))
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drv_data->clk_n_base_0 = true;
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if (!mv64xxx_find_baud_factors(drv_data, bus_freq, tclk)) {
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rc = -EINVAL;
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goto out;
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}
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