ARM: dts: apq8064: add PCIe devicetree node
Add the PCIe DT node so that it can probe and be used. Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -659,5 +659,41 @@ tcsr: syscon@1a400000 {
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compatible = "qcom,tcsr-apq8064", "syscon";
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reg = <0x1a400000 0x100>;
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};
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pcie: pci@1b500000 {
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compatible = "qcom,pcie-apq8064", "snps,dw-pcie";
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reg = <0x1b500000 0x1000
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0x1b502000 0x80
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0x1b600000 0x100
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0x0ff00000 0x100000>;
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reg-names = "dbi", "elbi", "parf", "config";
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device_type = "pci";
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linux,pci-domain = <0>;
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bus-range = <0x00 0xff>;
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num-lanes = <1>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges = <0x81000000 0 0 0x0fe00000 0 0x00100000 /* I/O */
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0x82000000 0 0 0x08000000 0 0x07e00000>; /* memory */
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interrupts = <GIC_SPI 238 IRQ_TYPE_NONE>;
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interrupt-names = "msi";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0x7>;
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interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>, /* int_a */
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<0 0 0 2 &intc 0 37 IRQ_TYPE_LEVEL_HIGH>, /* int_b */
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<0 0 0 3 &intc 0 38 IRQ_TYPE_LEVEL_HIGH>, /* int_c */
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<0 0 0 4 &intc 0 39 IRQ_TYPE_LEVEL_HIGH>; /* int_d */
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clocks = <&gcc PCIE_A_CLK>,
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<&gcc PCIE_H_CLK>,
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<&gcc PCIE_PHY_REF_CLK>;
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clock-names = "core", "iface", "phy";
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resets = <&gcc PCIE_ACLK_RESET>,
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<&gcc PCIE_HCLK_RESET>,
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<&gcc PCIE_POR_RESET>,
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<&gcc PCIE_PCI_RESET>,
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<&gcc PCIE_PHY_RESET>;
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reset-names = "axi", "ahb", "por", "pci", "phy";
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status = "disabled";
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};
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};
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};
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