megaraid_sas: Support for max_io_size 1MB
Driver will expose max sge = 256 (earlier it was 64) if firmware supports extended IO size (1M). Signed-off-by: Sumit Saxena <sumit.saxena@avagotech.com> Signed-off-by: Kashyap Desai <kashyap.desai@avagotech.com> Reviewed-by: Martin Petersen <martin.petersen@oracle.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -1239,7 +1239,8 @@ union megasas_sgl_frame {
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typedef union _MFI_CAPABILITIES {
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struct {
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#if defined(__BIG_ENDIAN_BITFIELD)
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u32 reserved:24;
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u32 reserved:23;
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u32 support_ext_io_size:1;
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u32 support_ext_queue_depth:1;
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u32 security_protocol_cmds_fw:1;
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u32 support_core_affinity:1;
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@ -1257,7 +1258,8 @@ typedef union _MFI_CAPABILITIES {
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u32 support_core_affinity:1;
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u32 security_protocol_cmds_fw:1;
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u32 support_ext_queue_depth:1;
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u32 reserved:24;
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u32 support_ext_io_size:1;
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u32 reserved:23;
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#endif
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} mfi_capabilities;
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__le32 reg;
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@ -1795,6 +1797,7 @@ struct megasas_instance {
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char mpio;
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u16 throttlequeuedepth;
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u8 mask_interrupts;
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u16 max_chain_frame_sz;
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u8 is_imr;
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bool dev_handle;
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};
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@ -316,26 +316,23 @@ static int megasas_create_frame_pool_fusion(struct megasas_instance *instance)
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u32 max_cmd;
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struct fusion_context *fusion;
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struct megasas_cmd_fusion *cmd;
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u32 total_sz_chain_frame;
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fusion = instance->ctrl_context;
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max_cmd = instance->max_fw_cmds;
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total_sz_chain_frame = MEGASAS_MAX_SZ_CHAIN_FRAME;
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/*
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* Use DMA pool facility provided by PCI layer
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*/
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fusion->sg_dma_pool = pci_pool_create("megasas sg pool fusion",
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instance->pdev,
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total_sz_chain_frame, 4,
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0);
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fusion->sg_dma_pool = pci_pool_create("sg_pool_fusion", instance->pdev,
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instance->max_chain_frame_sz,
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4, 0);
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if (!fusion->sg_dma_pool) {
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dev_printk(KERN_DEBUG, &instance->pdev->dev, "failed to setup request pool fusion\n");
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return -ENOMEM;
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}
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fusion->sense_dma_pool = pci_pool_create("megasas sense pool fusion",
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fusion->sense_dma_pool = pci_pool_create("sense pool fusion",
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instance->pdev,
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SCSI_SENSE_BUFFERSIZE, 64, 0);
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@ -666,6 +663,9 @@ megasas_ioc_init_fusion(struct megasas_instance *instance)
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drv_ops->mfi_capabilities.support_ndrive_r1_lb = 1;
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drv_ops->mfi_capabilities.security_protocol_cmds_fw = 1;
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if (instance->max_chain_frame_sz > MEGASAS_CHAIN_FRAME_SZ_MIN)
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drv_ops->mfi_capabilities.support_ext_io_size = 1;
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/* Convert capability to LE32 */
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cpu_to_le32s((u32 *)&init_frame->driver_operations.mfi_capabilities);
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@ -1054,7 +1054,7 @@ megasas_init_adapter_fusion(struct megasas_instance *instance)
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{
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struct megasas_register_set __iomem *reg_set;
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struct fusion_context *fusion;
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u32 max_cmd;
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u32 max_cmd, scratch_pad_2;
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int i = 0, count;
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fusion = instance->ctrl_context;
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@ -1093,15 +1093,40 @@ megasas_init_adapter_fusion(struct megasas_instance *instance)
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(MEGA_MPI2_RAID_DEFAULT_IO_FRAME_SIZE *
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(max_cmd + 1)); /* Extra 1 for SMID 0 */
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scratch_pad_2 = readl(&instance->reg_set->outbound_scratch_pad_2);
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/* If scratch_pad_2 & MEGASAS_MAX_CHAIN_SIZE_UNITS_MASK is set,
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* Firmware support extended IO chain frame which is 4 times more than
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* legacy Firmware.
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* Legacy Firmware - Frame size is (8 * 128) = 1K
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* 1M IO Firmware - Frame size is (8 * 128 * 4) = 4K
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*/
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if (scratch_pad_2 & MEGASAS_MAX_CHAIN_SIZE_UNITS_MASK)
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instance->max_chain_frame_sz =
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((scratch_pad_2 & MEGASAS_MAX_CHAIN_SIZE_MASK) >>
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MEGASAS_MAX_CHAIN_SHIFT) * MEGASAS_1MB_IO;
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else
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instance->max_chain_frame_sz =
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((scratch_pad_2 & MEGASAS_MAX_CHAIN_SIZE_MASK) >>
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MEGASAS_MAX_CHAIN_SHIFT) * MEGASAS_256K_IO;
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if (instance->max_chain_frame_sz < MEGASAS_CHAIN_FRAME_SZ_MIN) {
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dev_warn(&instance->pdev->dev, "frame size %d invalid, fall back to legacy max frame size %d\n",
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instance->max_chain_frame_sz,
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MEGASAS_CHAIN_FRAME_SZ_MIN);
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instance->max_chain_frame_sz = MEGASAS_CHAIN_FRAME_SZ_MIN;
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}
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fusion->max_sge_in_main_msg =
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(MEGA_MPI2_RAID_DEFAULT_IO_FRAME_SIZE -
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offsetof(struct MPI2_RAID_SCSI_IO_REQUEST, SGL))/16;
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(MEGA_MPI2_RAID_DEFAULT_IO_FRAME_SIZE
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- offsetof(struct MPI2_RAID_SCSI_IO_REQUEST, SGL))/16;
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fusion->max_sge_in_chain =
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MEGASAS_MAX_SZ_CHAIN_FRAME / sizeof(union MPI2_SGE_IO_UNION);
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instance->max_chain_frame_sz
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/ sizeof(union MPI2_SGE_IO_UNION);
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instance->max_num_sge = rounddown_pow_of_two(
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fusion->max_sge_in_main_msg + fusion->max_sge_in_chain - 2);
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instance->max_num_sge =
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rounddown_pow_of_two(fusion->max_sge_in_main_msg
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+ fusion->max_sge_in_chain - 2);
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/* Used for pass thru MFI frame (DCMD) */
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fusion->chain_offset_mfi_pthru =
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@ -1327,7 +1352,7 @@ megasas_make_sgl_fusion(struct megasas_instance *instance,
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sgl_ptr =
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(struct MPI25_IEEE_SGE_CHAIN64 *)cmd->sg_frame;
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memset(sgl_ptr, 0, MEGASAS_MAX_SZ_CHAIN_FRAME);
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memset(sgl_ptr, 0, instance->max_chain_frame_sz);
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}
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}
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@ -1892,7 +1917,7 @@ megasas_build_io_fusion(struct megasas_instance *instance,
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struct scsi_cmnd *scp,
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struct megasas_cmd_fusion *cmd)
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{
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u32 sge_count;
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u16 sge_count;
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u8 cmd_type;
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struct MPI2_RAID_SCSI_IO_REQUEST *io_request = cmd->io_request;
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@ -1950,7 +1975,11 @@ megasas_build_io_fusion(struct megasas_instance *instance,
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return 1;
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}
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/* numSGE store lower 8 bit of sge_count.
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* numSGEExt store higher 8 bit of sge_count
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*/
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io_request->RaidContext.numSGE = sge_count;
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io_request->RaidContext.numSGEExt = (u8)(sge_count >> 8);
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io_request->SGLFlags = cpu_to_le16(MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
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@ -2344,7 +2373,7 @@ build_mpt_mfi_pass_thru(struct megasas_instance *instance,
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mpi25_ieee_chain->Flags = IEEE_SGE_FLAGS_CHAIN_ELEMENT |
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MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR;
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mpi25_ieee_chain->Length = cpu_to_le32(MEGASAS_MAX_SZ_CHAIN_FRAME);
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mpi25_ieee_chain->Length = cpu_to_le32(instance->max_chain_frame_sz);
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return 0;
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}
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@ -35,8 +35,13 @@
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#define _MEGARAID_SAS_FUSION_H_
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/* Fusion defines */
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#define MEGASAS_MAX_SZ_CHAIN_FRAME 1024
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#define MEGASAS_CHAIN_FRAME_SZ_MIN 1024
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#define MFI_FUSION_ENABLE_INTERRUPT_MASK (0x00000009)
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#define MEGASAS_MAX_CHAIN_SHIFT 5
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#define MEGASAS_MAX_CHAIN_SIZE_UNITS_MASK 0x400000
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#define MEGASAS_MAX_CHAIN_SIZE_MASK 0x3E0
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#define MEGASAS_256K_IO 128
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#define MEGASAS_1MB_IO (MEGASAS_256K_IO * 4)
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#define MEGA_MPI2_RAID_DEFAULT_IO_FRAME_SIZE 256
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#define MEGASAS_MPI2_FUNCTION_PASSTHRU_IO_REQUEST 0xF0
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#define MEGASAS_MPI2_FUNCTION_LD_IO_REQUEST 0xF1
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@ -119,7 +124,8 @@ struct RAID_CONTEXT {
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__le16 configSeqNum;
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u8 spanArm;
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u8 priority;
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u8 resvd2[2];
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u8 numSGEExt;
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u8 resvd2;
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};
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#define RAID_CTX_SPANARM_ARM_SHIFT (0)
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