p71924506
/
linux_old1
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

[media] v4l: atmel-isi: Should clear bits before set the hardware register 

In the ISI driver it reads the config register to get original value,
then set the correct FRATE_DIV and YCC_SWAP_MODE directly. This will
cause some bits overlap.

So we need to clear these bits first, then set correct value. This patch
fix it.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Josh Wu 2013-12-10 09:25:47 -03:00 committed by Mauro Carvalho Chehab
parent 135983e8b3
commit bd6f27458b
2 changed files with 5 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/media/platform/soc_camera/atmel-isi.c
View File

@ -132,6 +132,8 @@ static int configure_geometry(struct atmel_isi *isi, u32 width,
isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
cfg2 = isi_readl(isi, ISI_CFG2);
/* Set YCC swap mode */
cfg2 &= ~ISI_CFG2_YCC_SWAP_MODE_MASK;
cfg2 |= cr;
/* Set width */
cfg2 &= ~(ISI_CFG2_IM_HSIZE_MASK);
@ -346,6 +348,7 @@ static void start_dma(struct atmel_isi *isi, struct frame_buffer *buffer)
isi_writel(isi, ISI_DMA_C_CTRL, ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);
cfg1 &= ~ISI_CFG1_FRATE_DIV_MASK;
/* Enable linked list */
cfg1 |= isi->pdata->frate | ISI_CFG1_DISCR;

2
include/media/atmel-isi.h
View File

@ -56,6 +56,7 @@
#define ISI_CFG1_FRATE_DIV_6 (5 << 8)
#define ISI_CFG1_FRATE_DIV_7 (6 << 8)
#define ISI_CFG1_FRATE_DIV_8 (7 << 8)
#define ISI_CFG1_FRATE_DIV_MASK (7 << 8)
#define ISI_CFG1_DISCR (1 << 11)
#define ISI_CFG1_FULL_MODE (1 << 12)
@ -66,6 +67,7 @@
#define ISI_CFG2_YCC_SWAP_MODE_1 (1 << 28)
#define ISI_CFG2_YCC_SWAP_MODE_2 (2 << 28)
#define ISI_CFG2_YCC_SWAP_MODE_3 (3 << 28)
#define ISI_CFG2_YCC_SWAP_MODE_MASK (3 << 28)
#define ISI_CFG2_IM_VSIZE_OFFSET 0
#define ISI_CFG2_IM_HSIZE_OFFSET 16
#define ISI_CFG2_IM_VSIZE_MASK (0x7FF << ISI_CFG2_IM_VSIZE_OFFSET)