radeon: moved HDMI color depth programming to a separate function
Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Slava Grigorev <slava.grigorev@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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930a978512
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@ -230,6 +230,8 @@ void dce3_1_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *m
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WREG32(HDMI0_AUDIO_CRC_CONTROL + offset, 0x1000);
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radeon_hdmi_set_color_depth(encoder);
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if (ASIC_IS_DCE32(rdev)) {
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WREG32(HDMI0_AUDIO_PACKET_CONTROL + offset,
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HDMI0_AUDIO_DELAY_EN(1) | /* default audio delay */
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@ -300,45 +300,12 @@ void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset)
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HDMI_GC_CONT); /* send general control packets every frame */
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}
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/*
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* update the info frames with the data from the current display mode
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*/
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void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode)
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void dce4_hdmi_set_color_depth(struct drm_encoder *encoder, u32 offset, int bpc)
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{
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struct drm_device *dev = encoder->dev;
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struct radeon_device *rdev = dev->dev_private;
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struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
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struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
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struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
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u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
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struct hdmi_avi_infoframe frame;
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uint32_t offset;
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ssize_t err;
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uint32_t val;
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int bpc = 8;
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if (!dig || !dig->afmt)
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return;
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/* Silent, r600_hdmi_enable will raise WARN for us */
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if (!dig->afmt->enabled)
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return;
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offset = dig->afmt->offset;
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/* hdmi deep color mode general control packets setup, if bpc > 8 */
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if (encoder->crtc) {
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
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bpc = radeon_crtc->bpc;
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}
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/* disable audio prior to setting up hw */
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dig->afmt->pin = radeon_audio_get_pin(encoder);
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radeon_audio_enable(rdev, dig->afmt->pin, 0);
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radeon_audio_set_dto(encoder, mode->clock);
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radeon_audio_set_vbi_packet(encoder);
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WREG32(AFMT_AUDIO_CRC_CONTROL + offset, 0x1000);
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val = RREG32(HDMI_CONTROL + offset);
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val &= ~HDMI_DEEP_COLOR_ENABLE;
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@ -368,6 +335,40 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
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}
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WREG32(HDMI_CONTROL + offset, val);
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}
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/*
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* update the info frames with the data from the current display mode
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*/
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void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mode)
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{
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struct drm_device *dev = encoder->dev;
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struct radeon_device *rdev = dev->dev_private;
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struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
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struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
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u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
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struct hdmi_avi_infoframe frame;
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uint32_t offset;
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ssize_t err;
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if (!dig || !dig->afmt)
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return;
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/* Silent, r600_hdmi_enable will raise WARN for us */
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if (!dig->afmt->enabled)
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return;
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offset = dig->afmt->offset;
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/* disable audio prior to setting up hw */
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dig->afmt->pin = radeon_audio_get_pin(encoder);
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radeon_audio_enable(rdev, dig->afmt->pin, 0);
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radeon_audio_set_dto(encoder, mode->clock);
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radeon_audio_set_vbi_packet(encoder);
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WREG32(AFMT_AUDIO_CRC_CONTROL + offset, 0x1000);
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radeon_hdmi_set_color_depth(encoder);
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WREG32(HDMI_INFOFRAME_CONTROL0 + offset,
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HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */
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@ -368,6 +368,7 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod
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radeon_audio_set_dto(encoder, mode->clock);
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radeon_audio_set_vbi_packet(encoder);
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radeon_hdmi_set_color_depth(encoder);
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WREG32_P(HDMI0_AUDIO_PACKET_CONTROL + offset,
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HDMI0_AUDIO_SAMPLE_SEND | /* send audio packets */
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@ -87,6 +87,8 @@ void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,
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const struct radeon_hdmi_acr *acr);
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void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
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void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
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void dce4_hdmi_set_color_depth(struct drm_encoder *encoder,
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u32 offset, int bpc);
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static const u32 pin_offsets[7] =
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{
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@ -169,6 +171,7 @@ static struct radeon_audio_funcs dce4_hdmi_funcs = {
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.set_dto = dce4_hdmi_audio_set_dto,
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.update_acr = evergreen_hdmi_update_acr,
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.set_vbi_packet = dce4_set_vbi_packet,
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.set_color_depth = dce4_hdmi_set_color_depth,
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};
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static struct radeon_audio_funcs dce4_dp_funcs = {
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@ -188,6 +191,7 @@ static struct radeon_audio_funcs dce6_hdmi_funcs = {
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.set_dto = dce6_hdmi_audio_set_dto,
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.update_acr = evergreen_hdmi_update_acr,
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.set_vbi_packet = dce4_set_vbi_packet,
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.set_color_depth = dce4_hdmi_set_color_depth,
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};
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static struct radeon_audio_funcs dce6_dp_funcs = {
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@ -574,3 +578,21 @@ void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
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if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
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radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
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}
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void radeon_hdmi_set_color_depth(struct drm_encoder *encoder)
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{
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int bpc = 8;
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struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
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struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
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if (!dig || !dig->afmt)
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return;
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if (encoder->crtc) {
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
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bpc = radeon_crtc->bpc;
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}
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if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth)
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radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
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}
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@ -58,6 +58,7 @@ struct radeon_audio_funcs
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void (*update_acr)(struct drm_encoder *encoder, long offset,
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const struct radeon_hdmi_acr *acr);
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void (*set_vbi_packet)(struct drm_encoder *encoder, u32 offset);
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void (*set_color_depth)(struct drm_encoder *encoder, u32 offset, int bpc);
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};
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int radeon_audio_init(struct radeon_device *rdev);
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@ -81,5 +82,6 @@ void radeon_update_avi_infoframe(struct drm_encoder *encoder, void *buffer,
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size_t size);
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void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock);
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void radeon_audio_set_vbi_packet(struct drm_encoder *encoder);
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void radeon_hdmi_set_color_depth(struct drm_encoder *encoder);
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#endif
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