dt-bindings: clk: add G12A AO Clock and Reset Bindings
Add bindings for the Amlogic G12A AO Clock and Reset controllers. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190212162859.20743-2-narmstrong@baylibre.com
This commit is contained in:
parent
6682bd4d44
commit
be3d960b0a
|
@ -10,6 +10,7 @@ Required Properties:
|
|||
- GXL (S905X, S905D) : "amlogic,meson-gxl-aoclkc"
|
||||
- GXM (S912) : "amlogic,meson-gxm-aoclkc"
|
||||
- AXG (A113D, A113X) : "amlogic,meson-axg-aoclkc"
|
||||
- G12A (S905X2, S905D2, S905Y2) : "amlogic,meson-g12a-aoclkc"
|
||||
followed by the common "amlogic,meson-gx-aoclkc"
|
||||
- clocks: list of clock phandle, one for each entry clock-names.
|
||||
- clock-names: should contain the following:
|
||||
|
|
|
@ -0,0 +1,34 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
|
||||
/*
|
||||
* Copyright (c) 2016 BayLibre, SAS
|
||||
* Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
*
|
||||
* Copyright (c) 2018 Amlogic, inc.
|
||||
* Author: Qiufang Dai <qiufang.dai@amlogic.com>
|
||||
*/
|
||||
|
||||
#ifndef DT_BINDINGS_CLOCK_AMLOGIC_MESON_G12A_AOCLK
|
||||
#define DT_BINDINGS_CLOCK_AMLOGIC_MESON_G12A_AOCLK
|
||||
|
||||
#define CLKID_AO_AHB 0
|
||||
#define CLKID_AO_IR_IN 1
|
||||
#define CLKID_AO_I2C_M0 2
|
||||
#define CLKID_AO_I2C_S0 3
|
||||
#define CLKID_AO_UART 4
|
||||
#define CLKID_AO_PROD_I2C 5
|
||||
#define CLKID_AO_UART2 6
|
||||
#define CLKID_AO_IR_OUT 7
|
||||
#define CLKID_AO_SAR_ADC 8
|
||||
#define CLKID_AO_MAILBOX 9
|
||||
#define CLKID_AO_M3 10
|
||||
#define CLKID_AO_AHB_SRAM 11
|
||||
#define CLKID_AO_RTI 12
|
||||
#define CLKID_AO_M4_FCLK 13
|
||||
#define CLKID_AO_M4_HCLK 14
|
||||
#define CLKID_AO_CLK81 15
|
||||
#define CLKID_AO_SAR_ADC_CLK 18
|
||||
#define CLKID_AO_32K 23
|
||||
#define CLKID_AO_CEC 27
|
||||
#define CLKID_AO_CTS_RTC_OSCIN 28
|
||||
|
||||
#endif
|
|
@ -0,0 +1,18 @@
|
|||
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
|
||||
/*
|
||||
* Copyright (c) 2016 BayLibre, SAS
|
||||
* Author: Neil Armstrong <narmstrong@baylibre.com>
|
||||
*/
|
||||
|
||||
#ifndef DT_BINDINGS_RESET_AMLOGIC_MESON_G12A_AOCLK
|
||||
#define DT_BINDINGS_RESET_AMLOGIC_MESON_G12A_AOCLK
|
||||
|
||||
#define RESET_AO_IR_IN 0
|
||||
#define RESET_AO_UART 1
|
||||
#define RESET_AO_I2C_M 2
|
||||
#define RESET_AO_I2C_S 3
|
||||
#define RESET_AO_SAR_ADC 4
|
||||
#define RESET_AO_UART2 5
|
||||
#define RESET_AO_IR_OUT 6
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue