p71924506
/
linux_old1
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Merge branch 'linux-4.15' of git://github.com/skeggsb/linux into drm-next 

nouveau next fixes.

Fixes arm32 build.

* 'linux-4.15' of git://github.com/skeggsb/linux:
  drm/nouveau/bios/timing: mark expected switch fall-throughs
  drm/nouveau/devinit/nv04: mark expected switch fall-throughs
  drm/nouveau/bios: make const arrays hwsq_signature and edid_sig static
  drm/nouveau/core/memory: fix missing mutex unlock
  drm/nouveau/mmu: swap out round for ALIGN
This commit is contained in:
Dave Airlie 2017-11-03 09:17:08 +10:00
parent 9ad472e337 d34ded7ece
commit bf6eb600e5
5 changed files with 16 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
drivers/gpu/drm/nouveau/nouveau_bios.c
View File

@ -1968,7 +1968,7 @@ static int load_nv17_hw_sequencer_ucode(struct drm_device *dev,
* The microcode entries are found by the "HWSQ" signature.
*/
const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' };
static const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' };
const int sz = sizeof(hwsq_signature);
int hwsq_offset;
@ -1984,7 +1984,7 @@ uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev)
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvbios *bios = &drm->vbios;
const uint8_t edid_sig[] = {
static const uint8_t edid_sig[] = {
0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
uint16_t offset = 0;
uint16_t newoffset;

1
drivers/gpu/drm/nouveau/nvkm/core/memory.c
View File

@ -64,6 +64,7 @@ nvkm_memory_tags_get(struct nvkm_memory *memory, struct nvkm_device *device,
}
refcount_inc(&tags->refcount);
mutex_unlock(&fb->subdev.mutex);
*ptags = tags;
return 0;
}

5
drivers/gpu/drm/nouveau/nvkm/subdev/bios/timing.c
View File

@ -115,16 +115,21 @@ nvbios_timingEp(struct nvkm_bios *bios, int idx,
switch (min_t(u8, *hdr, 25)) {
case 25:
p->timing_10_24 = nvbios_rd08(bios, data + 0x18);
/* fall through */
case 24:
case 23:
case 22:
p->timing_10_21 = nvbios_rd08(bios, data + 0x15);
/* fall through */
case 21:
p->timing_10_20 = nvbios_rd08(bios, data + 0x14);
/* fall through */
case 20:
p->timing_10_CWL = nvbios_rd08(bios, data + 0x13);
/* fall through */
case 19:
p->timing_10_18 = nvbios_rd08(bios, data + 0x12);
/* fall through */
case 18:
case 17:
p->timing_10_16 = nvbios_rd08(bios, data + 0x10);

12
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv04.c
View File

@ -119,11 +119,11 @@ powerctrl_1_shift(int chip_version, int reg)
switch (reg) {
case 0x680520:
shift += 4;
shift += 4; /* fall through */
case 0x680508:
shift += 4;
shift += 4; /* fall through */
case 0x680504:
shift += 4;
shift += 4; /* fall through */
case 0x680500:
shift += 4;
}
@ -245,11 +245,11 @@ setPLL_double_highregs(struct nvkm_devinit *init, u32 reg1,
switch (reg1) {
case 0x680504:
shift_c040 += 2;
shift_c040 += 2; /* fall through */
case 0x680500:
shift_c040 += 2;
shift_c040 += 2; /* fall through */
case 0x680520:
shift_c040 += 2;
shift_c040 += 2; /* fall through */
case 0x680508:
shift_c040 += 2;
}

4
drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c
View File

@ -1349,12 +1349,12 @@ nvkm_vmm_get_locked(struct nvkm_vmm *vmm, bool getref, bool mapref, bool sparse,
addr = this->addr;
if (vmm->func->page_block && prev && prev->page != p)
addr = roundup(addr, vmm->func->page_block);
addr = ALIGN(addr, vmm->func->page_block);
addr = ALIGN(addr, 1ULL << align);
tail = this->addr + this->size;
if (vmm->func->page_block && next && next->page != p)
tail = rounddown(tail, vmm->func->page_block);
tail = ALIGN_DOWN(addr, vmm->func->page_block);
if (addr <= tail && tail - addr >= size) {
rb_erase(&this->tree, &vmm->free);