drm/msm/mdp5: introduce mdp5_hw_pipe
Split out the hardware pipe specifics from mdp5_plane. To start, the hw pipes are statically assigned to planes, but next step is to assign the hw pipes during plane->atomic_check() based on requested caps (scaling, YUV, etc). And then hw pipe re-assignment if required if required SMP blocks changes. Signed-off-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Archit Taneja <architt@codeaurora.org>
This commit is contained in:
Rob Clark
parent
f5903bad80
commit
c056b55dc6
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@ -37,6 +37,7 @@ msm-y := \
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mdp/mdp5/mdp5_irq.o \
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mdp/mdp5/mdp5_mdss.o \
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mdp/mdp5/mdp5_kms.o \
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mdp/mdp5/mdp5_pipe.o \
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mdp/mdp5/mdp5_plane.o \
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mdp/mdp5/mdp5_smp.o \
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msm_atomic.o \
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@ -27,8 +27,6 @@
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#define CURSOR_WIDTH 64
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#define CURSOR_HEIGHT 64
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#define SSPP_MAX (SSPP_RGB3 + 1) /* TODO: Add SSPP_MAX in mdp5.xml.h */
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struct mdp5_crtc {
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struct drm_crtc base;
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int id;
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@ -119,6 +119,10 @@ static void mdp5_kms_destroy(struct msm_kms *kms)
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{
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struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
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struct msm_gem_address_space *aspace = mdp5_kms->aspace;
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int i;
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for (i = 0; i < mdp5_kms->num_hwpipes; i++)
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mdp5_pipe_destroy(mdp5_kms->hwpipes[i]);
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if (aspace) {
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aspace->mmu->funcs->detach(aspace->mmu,
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@ -323,15 +327,6 @@ static int modeset_init_intf(struct mdp5_kms *mdp5_kms, int intf_num)
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static int modeset_init(struct mdp5_kms *mdp5_kms)
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{
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static const enum mdp5_pipe rgb_planes[] = {
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SSPP_RGB0, SSPP_RGB1, SSPP_RGB2, SSPP_RGB3,
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};
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static const enum mdp5_pipe vig_planes[] = {
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SSPP_VIG0, SSPP_VIG1, SSPP_VIG2, SSPP_VIG3,
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};
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static const enum mdp5_pipe dma_planes[] = {
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SSPP_DMA0, SSPP_DMA1,
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};
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struct drm_device *dev = mdp5_kms->dev;
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struct msm_drm_private *priv = dev->dev_private;
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const struct mdp5_cfg_hw *hw_cfg;
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@ -339,58 +334,34 @@ static int modeset_init(struct mdp5_kms *mdp5_kms)
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hw_cfg = mdp5_cfg_get_hw_config(mdp5_kms->cfg);
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/* construct CRTCs and their private planes: */
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for (i = 0; i < hw_cfg->pipe_rgb.count; i++) {
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/* Construct planes equaling the number of hw pipes, and CRTCs
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* for the N layer-mixers (LM). The first N planes become primary
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* planes for the CRTCs, with the remainder as overlay planes:
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*/
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for (i = 0; i < mdp5_kms->num_hwpipes; i++) {
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bool primary = i < mdp5_cfg->lm.count;
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struct drm_plane *plane;
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struct drm_crtc *crtc;
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plane = mdp5_plane_init(dev, rgb_planes[i], true,
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hw_cfg->pipe_rgb.base[i], hw_cfg->pipe_rgb.caps);
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plane = mdp5_plane_init(dev, mdp5_kms->hwpipes[i], primary);
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if (IS_ERR(plane)) {
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ret = PTR_ERR(plane);
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dev_err(dev->dev, "failed to construct plane for %s (%d)\n",
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pipe2name(rgb_planes[i]), ret);
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dev_err(dev->dev, "failed to construct plane %d (%d)\n", i, ret);
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goto fail;
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}
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if (!primary)
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continue;
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crtc = mdp5_crtc_init(dev, plane, i);
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if (IS_ERR(crtc)) {
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ret = PTR_ERR(crtc);
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dev_err(dev->dev, "failed to construct crtc for %s (%d)\n",
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pipe2name(rgb_planes[i]), ret);
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dev_err(dev->dev, "failed to construct crtc %d (%d)\n", i, ret);
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goto fail;
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}
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priv->crtcs[priv->num_crtcs++] = crtc;
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}
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/* Construct video planes: */
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for (i = 0; i < hw_cfg->pipe_vig.count; i++) {
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struct drm_plane *plane;
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plane = mdp5_plane_init(dev, vig_planes[i], false,
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hw_cfg->pipe_vig.base[i], hw_cfg->pipe_vig.caps);
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if (IS_ERR(plane)) {
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ret = PTR_ERR(plane);
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dev_err(dev->dev, "failed to construct %s plane: %d\n",
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pipe2name(vig_planes[i]), ret);
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goto fail;
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}
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}
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/* DMA planes */
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for (i = 0; i < hw_cfg->pipe_dma.count; i++) {
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struct drm_plane *plane;
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plane = mdp5_plane_init(dev, dma_planes[i], false,
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hw_cfg->pipe_dma.base[i], hw_cfg->pipe_dma.caps);
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if (IS_ERR(plane)) {
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ret = PTR_ERR(plane);
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dev_err(dev->dev, "failed to construct %s plane: %d\n",
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pipe2name(dma_planes[i]), ret);
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goto fail;
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}
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}
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/* Construct encoders and modeset initialize connector devices
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* for each external display interface.
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*/
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@ -676,6 +647,67 @@ static void mdp5_destroy(struct platform_device *pdev)
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pm_runtime_disable(&pdev->dev);
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}
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static int construct_pipes(struct mdp5_kms *mdp5_kms, int cnt,
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const enum mdp5_pipe *pipes, const uint32_t *offsets,
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uint32_t caps)
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{
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struct drm_device *dev = mdp5_kms->dev;
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int i, ret;
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for (i = 0; i < cnt; i++) {
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struct mdp5_hw_pipe *hwpipe;
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hwpipe = mdp5_pipe_init(pipes[i], offsets[i], caps);
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if (IS_ERR(hwpipe)) {
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ret = PTR_ERR(hwpipe);
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dev_err(dev->dev, "failed to construct pipe for %s (%d)\n",
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pipe2name(pipes[i]), ret);
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return ret;
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}
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hwpipe->idx = mdp5_kms->num_hwpipes;
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mdp5_kms->hwpipes[mdp5_kms->num_hwpipes++] = hwpipe;
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}
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return 0;
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}
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static int hwpipe_init(struct mdp5_kms *mdp5_kms)
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{
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static const enum mdp5_pipe rgb_planes[] = {
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SSPP_RGB0, SSPP_RGB1, SSPP_RGB2, SSPP_RGB3,
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};
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static const enum mdp5_pipe vig_planes[] = {
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SSPP_VIG0, SSPP_VIG1, SSPP_VIG2, SSPP_VIG3,
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};
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static const enum mdp5_pipe dma_planes[] = {
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SSPP_DMA0, SSPP_DMA1,
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};
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const struct mdp5_cfg_hw *hw_cfg;
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int ret;
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hw_cfg = mdp5_cfg_get_hw_config(mdp5_kms->cfg);
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/* Construct RGB pipes: */
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ret = construct_pipes(mdp5_kms, hw_cfg->pipe_rgb.count, rgb_planes,
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hw_cfg->pipe_rgb.base, hw_cfg->pipe_rgb.caps);
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if (ret)
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return ret;
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/* Construct video (VIG) pipes: */
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ret = construct_pipes(mdp5_kms, hw_cfg->pipe_vig.count, vig_planes,
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hw_cfg->pipe_vig.base, hw_cfg->pipe_vig.caps);
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if (ret)
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return ret;
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/* Construct DMA pipes: */
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ret = construct_pipes(mdp5_kms, hw_cfg->pipe_dma.count, dma_planes,
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hw_cfg->pipe_dma.base, hw_cfg->pipe_dma.caps);
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if (ret)
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return ret;
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return 0;
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}
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static int mdp5_init(struct platform_device *pdev, struct drm_device *dev)
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{
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struct msm_drm_private *priv = dev->dev_private;
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@ -765,6 +797,10 @@ static int mdp5_init(struct platform_device *pdev, struct drm_device *dev)
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goto fail;
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}
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ret = hwpipe_init(mdp5_kms);
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if (ret)
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goto fail;
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/* set uninit-ed kms */
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priv->kms = &mdp5_kms->base.base;
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@ -24,6 +24,7 @@
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#include "mdp5_cfg.h" /* must be included before mdp5.xml.h */
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#include "mdp5.xml.h"
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#include "mdp5_ctl.h"
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#include "mdp5_pipe.h"
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#include "mdp5_smp.h"
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struct mdp5_kms {
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@ -33,6 +34,9 @@ struct mdp5_kms {
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struct platform_device *pdev;
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unsigned num_hwpipes;
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struct mdp5_hw_pipe *hwpipes[SSPP_MAX];
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struct mdp5_cfg_handler *cfg;
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uint32_t caps; /* MDP capabilities (MDP_CAP_XXX bits) */
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@ -207,8 +211,7 @@ void mdp5_plane_complete_commit(struct drm_plane *plane,
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struct drm_plane_state *state);
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enum mdp5_pipe mdp5_plane_pipe(struct drm_plane *plane);
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struct drm_plane *mdp5_plane_init(struct drm_device *dev,
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enum mdp5_pipe pipe, bool private_plane,
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uint32_t reg_offset, uint32_t caps);
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struct mdp5_hw_pipe *hwpipe, bool primary);
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uint32_t mdp5_crtc_vblank(struct drm_crtc *crtc);
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@ -0,0 +1,43 @@
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/*
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* Copyright (C) 2016 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "mdp5_kms.h"
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void mdp5_pipe_destroy(struct mdp5_hw_pipe *hwpipe)
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{
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kfree(hwpipe);
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}
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struct mdp5_hw_pipe *mdp5_pipe_init(enum mdp5_pipe pipe,
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uint32_t reg_offset, uint32_t caps)
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{
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struct mdp5_hw_pipe *hwpipe;
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hwpipe = kzalloc(sizeof(*hwpipe), GFP_KERNEL);
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if (!hwpipe)
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return ERR_PTR(-ENOMEM);
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hwpipe->name = pipe2name(pipe);
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hwpipe->pipe = pipe;
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hwpipe->reg_offset = reg_offset;
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hwpipe->caps = caps;
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hwpipe->flush_mask = mdp_ctl_flush_mask_pipe(pipe);
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spin_lock_init(&hwpipe->pipe_lock);
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return hwpipe;
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}
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@ -0,0 +1,41 @@
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/*
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* Copyright (C) 2016 Red Hat
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* Author: Rob Clark <robdclark@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published by
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* the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __MDP5_PIPE_H__
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#define __MDP5_PIPE_H__
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#define SSPP_MAX (SSPP_RGB3 + 1) /* TODO: Add SSPP_MAX in mdp5.xml.h */
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/* represents a hw pipe, which is dynamically assigned to a plane */
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struct mdp5_hw_pipe {
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int idx;
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const char *name;
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enum mdp5_pipe pipe;
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spinlock_t pipe_lock; /* protect REG_MDP5_PIPE_* registers */
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uint32_t reg_offset;
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uint32_t caps;
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uint32_t flush_mask; /* used to commit pipe registers */
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};
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struct mdp5_hw_pipe *mdp5_pipe_init(enum mdp5_pipe pipe,
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uint32_t reg_offset, uint32_t caps);
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void mdp5_pipe_destroy(struct mdp5_hw_pipe *hwpipe);
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#endif /* __MDP5_PIPE_H__ */
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@ -22,13 +22,7 @@
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struct mdp5_plane {
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struct drm_plane base;
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enum mdp5_pipe pipe;
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spinlock_t pipe_lock; /* protect REG_MDP5_PIPE_* registers */
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uint32_t reg_offset;
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uint32_t caps;
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uint32_t flush_mask; /* used to commit pipe registers */
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struct mdp5_hw_pipe *hwpipe;
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uint32_t nformats;
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uint32_t formats[32];
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@ -71,8 +65,8 @@ static void mdp5_plane_install_rotation_property(struct drm_device *dev,
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{
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struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane);
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if (!(mdp5_plane->caps & MDP_PIPE_CAP_HFLIP) &&
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!(mdp5_plane->caps & MDP_PIPE_CAP_VFLIP))
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if (!(mdp5_plane->hwpipe->caps & MDP_PIPE_CAP_HFLIP) &&
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!(mdp5_plane->hwpipe->caps & MDP_PIPE_CAP_VFLIP))
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return;
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drm_plane_create_rotation_property(plane,
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@ -301,13 +295,13 @@ static int mdp5_plane_atomic_check(struct drm_plane *plane,
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format = to_mdp_format(msm_framebuffer_format(state->fb));
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if (MDP_FORMAT_IS_YUV(format) &&
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!pipe_supports_yuv(mdp5_plane->caps)) {
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!pipe_supports_yuv(mdp5_plane->hwpipe->caps)) {
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DBG("Pipe doesn't support YUV\n");
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return -EINVAL;
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}
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if (!(mdp5_plane->caps & MDP_PIPE_CAP_SCALE) &&
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if (!(mdp5_plane->hwpipe->caps & MDP_PIPE_CAP_SCALE) &&
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(((state->src_w >> 16) != state->crtc_w) ||
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((state->src_h >> 16) != state->crtc_h))) {
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DBG("Pipe doesn't support scaling (%dx%d -> %dx%d)\n",
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@ -321,11 +315,12 @@ static int mdp5_plane_atomic_check(struct drm_plane *plane,
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DRM_ROTATE_0 |
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DRM_REFLECT_X |
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DRM_REFLECT_Y);
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hflip = !!(rotation & DRM_REFLECT_X);
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vflip = !!(rotation & DRM_REFLECT_Y);
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if ((vflip && !(mdp5_plane->caps & MDP_PIPE_CAP_VFLIP)) ||
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(hflip && !(mdp5_plane->caps & MDP_PIPE_CAP_HFLIP))) {
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if ((vflip && !(mdp5_plane->hwpipe->caps & MDP_PIPE_CAP_VFLIP)) ||
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(hflip && !(mdp5_plane->hwpipe->caps & MDP_PIPE_CAP_HFLIP))) {
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DBG("Pipe doesn't support flip\n");
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return -EINVAL;
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@ -393,7 +388,7 @@ static void set_scanout_locked(struct drm_plane *plane,
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{
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struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane);
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struct mdp5_kms *mdp5_kms = get_kms(plane);
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enum mdp5_pipe pipe = mdp5_plane->pipe;
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enum mdp5_pipe pipe = mdp5_plane->hwpipe->pipe;
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mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_STRIDE_A(pipe),
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MDP5_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) |
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@ -675,12 +670,13 @@ static int mdp5_plane_mode_set(struct drm_plane *plane,
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{
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struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane);
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struct drm_plane_state *pstate = plane->state;
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struct mdp5_hw_pipe *hwpipe = mdp5_plane->hwpipe;
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struct mdp5_kms *mdp5_kms = get_kms(plane);
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enum mdp5_pipe pipe = mdp5_plane->pipe;
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enum mdp5_pipe pipe = hwpipe->pipe;
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const struct mdp_format *format;
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uint32_t nplanes, config = 0;
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uint32_t phasex_step[COMP_MAX] = {0,}, phasey_step[COMP_MAX] = {0,};
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bool pe = mdp5_plane->caps & MDP_PIPE_CAP_SW_PIX_EXT;
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bool pe = hwpipe->caps & MDP_PIPE_CAP_SW_PIX_EXT;
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int pe_left[COMP_MAX], pe_right[COMP_MAX];
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int pe_top[COMP_MAX], pe_bottom[COMP_MAX];
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uint32_t hdecm = 0, vdecm = 0;
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@ -711,8 +707,8 @@ static int mdp5_plane_mode_set(struct drm_plane *plane,
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/* Request some memory from the SMP: */
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if (mdp5_kms->smp) {
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ret = mdp5_smp_request(mdp5_kms->smp,
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mdp5_plane->pipe, format, src_w, false);
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ret = mdp5_smp_request(mdp5_kms->smp, pipe,
|
||||
format, src_w, false);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -734,7 +730,7 @@ static int mdp5_plane_mode_set(struct drm_plane *plane,
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (mdp5_plane->caps & MDP_PIPE_CAP_SW_PIX_EXT) {
|
||||
if (hwpipe->caps & MDP_PIPE_CAP_SW_PIX_EXT) {
|
||||
calc_pixel_ext(format, src_w, crtc_w, phasex_step,
|
||||
pe_left, pe_right, true);
|
||||
calc_pixel_ext(format, src_h, crtc_h, phasey_step,
|
||||
|
|
@ -755,7 +751,7 @@ static int mdp5_plane_mode_set(struct drm_plane *plane,
|
|||
hflip = !!(rotation & DRM_REFLECT_X);
|
||||
vflip = !!(rotation & DRM_REFLECT_Y);
|
||||
|
||||
spin_lock_irqsave(&mdp5_plane->pipe_lock, flags);
|
||||
spin_lock_irqsave(&hwpipe->pipe_lock, flags);
|
||||
|
||||
mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_IMG_SIZE(pipe),
|
||||
MDP5_PIPE_SRC_IMG_SIZE_WIDTH(min(fb->width, src_w)) |
|
||||
|
|
@ -804,12 +800,12 @@ static int mdp5_plane_mode_set(struct drm_plane *plane,
|
|||
/* not using secure mode: */
|
||||
mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_ADDR_SW_STATUS(pipe), 0);
|
||||
|
||||
if (mdp5_plane->caps & MDP_PIPE_CAP_SW_PIX_EXT)
|
||||
if (hwpipe->caps & MDP_PIPE_CAP_SW_PIX_EXT)
|
||||
mdp5_write_pixel_ext(mdp5_kms, pipe, format,
|
||||
src_w, pe_left, pe_right,
|
||||
src_h, pe_top, pe_bottom);
|
||||
|
||||
if (mdp5_plane->caps & MDP_PIPE_CAP_SCALE) {
|
||||
if (hwpipe->caps & MDP_PIPE_CAP_SCALE) {
|
||||
mdp5_write(mdp5_kms, REG_MDP5_PIPE_SCALE_PHASE_STEP_X(pipe),
|
||||
phasex_step[COMP_0]);
|
||||
mdp5_write(mdp5_kms, REG_MDP5_PIPE_SCALE_PHASE_STEP_Y(pipe),
|
||||
|
|
@ -824,7 +820,7 @@ static int mdp5_plane_mode_set(struct drm_plane *plane,
|
|||
mdp5_write(mdp5_kms, REG_MDP5_PIPE_SCALE_CONFIG(pipe), config);
|
||||
}
|
||||
|
||||
if (mdp5_plane->caps & MDP_PIPE_CAP_CSC) {
|
||||
if (hwpipe->caps & MDP_PIPE_CAP_CSC) {
|
||||
if (MDP_FORMAT_IS_YUV(format))
|
||||
csc_enable(mdp5_kms, pipe,
|
||||
mdp_get_default_csc_cfg(CSC_YUV2RGB));
|
||||
|
|
@ -834,7 +830,7 @@ static int mdp5_plane_mode_set(struct drm_plane *plane,
|
|||
|
||||
set_scanout_locked(plane, fb);
|
||||
|
||||
spin_unlock_irqrestore(&mdp5_plane->pipe_lock, flags);
|
||||
spin_unlock_irqrestore(&hwpipe->pipe_lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -842,14 +838,14 @@ static int mdp5_plane_mode_set(struct drm_plane *plane,
|
|||
enum mdp5_pipe mdp5_plane_pipe(struct drm_plane *plane)
|
||||
{
|
||||
struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane);
|
||||
return mdp5_plane->pipe;
|
||||
return mdp5_plane->hwpipe->pipe;
|
||||
}
|
||||
|
||||
uint32_t mdp5_plane_get_flush(struct drm_plane *plane)
|
||||
{
|
||||
struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane);
|
||||
|
||||
return mdp5_plane->flush_mask;
|
||||
return mdp5_plane->hwpipe->flush_mask;
|
||||
}
|
||||
|
||||
/* called after vsync in thread context */
|
||||
|
|
@ -858,7 +854,7 @@ void mdp5_plane_complete_commit(struct drm_plane *plane,
|
|||
{
|
||||
struct mdp5_kms *mdp5_kms = get_kms(plane);
|
||||
struct mdp5_plane *mdp5_plane = to_mdp5_plane(plane);
|
||||
enum mdp5_pipe pipe = mdp5_plane->pipe;
|
||||
enum mdp5_pipe pipe = mdp5_plane->hwpipe->pipe;
|
||||
|
||||
if (mdp5_kms->smp) {
|
||||
if (plane_enabled(plane->state)) {
|
||||
|
|
@ -875,8 +871,7 @@ void mdp5_plane_complete_commit(struct drm_plane *plane,
|
|||
|
||||
/* initialize plane */
|
||||
struct drm_plane *mdp5_plane_init(struct drm_device *dev,
|
||||
enum mdp5_pipe pipe, bool private_plane, uint32_t reg_offset,
|
||||
uint32_t caps)
|
||||
struct mdp5_hw_pipe *hwpipe, bool primary)
|
||||
{
|
||||
struct drm_plane *plane = NULL;
|
||||
struct mdp5_plane *mdp5_plane;
|
||||
|
|
@ -891,21 +886,16 @@ struct drm_plane *mdp5_plane_init(struct drm_device *dev,
|
|||
|
||||
plane = &mdp5_plane->base;
|
||||
|
||||
mdp5_plane->pipe = pipe;
|
||||
mdp5_plane->caps = caps;
|
||||
mdp5_plane->hwpipe = hwpipe;
|
||||
|
||||
mdp5_plane->nformats = mdp_get_formats(mdp5_plane->formats,
|
||||
ARRAY_SIZE(mdp5_plane->formats),
|
||||
!pipe_supports_yuv(mdp5_plane->caps));
|
||||
!pipe_supports_yuv(hwpipe->caps));
|
||||
|
||||
mdp5_plane->flush_mask = mdp_ctl_flush_mask_pipe(pipe);
|
||||
mdp5_plane->reg_offset = reg_offset;
|
||||
spin_lock_init(&mdp5_plane->pipe_lock);
|
||||
|
||||
type = private_plane ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
|
||||
type = primary ? DRM_PLANE_TYPE_PRIMARY : DRM_PLANE_TYPE_OVERLAY;
|
||||
ret = drm_universal_plane_init(dev, plane, 0xff, &mdp5_plane_funcs,
|
||||
mdp5_plane->formats, mdp5_plane->nformats,
|
||||
type, "%s", pipe2name(pipe));
|
||||
type, "%s", hwpipe->name);
|
||||
if (ret)
|
||||
goto fail;
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue