drm/amd/pp: fix the wrong readout engine clock in deep sleep
Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -3805,7 +3805,7 @@ static int vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
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void *value, int *size)
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void *value, int *size)
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{
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{
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struct amdgpu_device *adev = hwmgr->adev;
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struct amdgpu_device *adev = hwmgr->adev;
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uint32_t sclk_idx, mclk_idx, activity_percent = 0;
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uint32_t sclk_mhz, mclk_idx, activity_percent = 0;
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struct vega10_hwmgr *data = hwmgr->backend;
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struct vega10_hwmgr *data = hwmgr->backend;
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struct vega10_dpm_table *dpm_table = &data->dpm_table;
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struct vega10_dpm_table *dpm_table = &data->dpm_table;
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int ret = 0;
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int ret = 0;
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@ -3813,14 +3813,9 @@ static int vega10_read_sensor(struct pp_hwmgr *hwmgr, int idx,
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switch (idx) {
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switch (idx) {
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case AMDGPU_PP_SENSOR_GFX_SCLK:
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case AMDGPU_PP_SENSOR_GFX_SCLK:
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smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentGfxclkIndex);
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smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetAverageGfxclkActualFrequency);
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sclk_idx = smum_get_argument(hwmgr);
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sclk_mhz = smum_get_argument(hwmgr);
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if (sclk_idx < dpm_table->gfx_table.count) {
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*((uint32_t *)value) = sclk_mhz * 100;
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*((uint32_t *)value) = dpm_table->gfx_table.dpm_levels[sclk_idx].value;
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*size = 4;
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} else {
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ret = -EINVAL;
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}
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break;
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break;
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case AMDGPU_PP_SENSOR_GFX_MCLK:
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case AMDGPU_PP_SENSOR_GFX_MCLK:
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smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentUclkIndex);
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smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentUclkIndex);
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@ -131,6 +131,7 @@ typedef uint16_t PPSMC_Result;
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#define PPSMC_MSG_RunAcgInOpenLoop 0x5E
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#define PPSMC_MSG_RunAcgInOpenLoop 0x5E
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#define PPSMC_MSG_InitializeAcg 0x5F
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#define PPSMC_MSG_InitializeAcg 0x5F
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#define PPSMC_MSG_GetCurrPkgPwr 0x61
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#define PPSMC_MSG_GetCurrPkgPwr 0x61
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#define PPSMC_MSG_GetAverageGfxclkActualFrequency 0x63
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#define PPSMC_MSG_SetPccThrottleLevel 0x67
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#define PPSMC_MSG_SetPccThrottleLevel 0x67
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#define PPSMC_MSG_UpdatePkgPwrPidAlpha 0x68
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#define PPSMC_MSG_UpdatePkgPwrPidAlpha 0x68
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#define PPSMC_Message_Count 0x69
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#define PPSMC_Message_Count 0x69
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