ARM: dts: Add support for the cpuimx51 board from Eukrea and its baseboard.
The following devices/functionalities were added: * Main and secondary UARTs. * i2c and the pcf8563 device. * Ethernet. * NAND. * The BP1 button. * The LED. * Watchdog * SD. Cc: Rob Herring <rob.herring@calxeda.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: devicetree@vger.kernel.org Cc: Sascha Hauer <kernel@pengutronix.de> Cc: linux-arm-kernel@lists.infradead.org Cc: Eric Bénard <eric@eukrea.com> Signed-off-by: Denis Carikli <denis@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -146,6 +146,7 @@ dtb-$(CONFIG_ARCH_MXC) += \
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imx51-apf51.dtb \
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imx51-apf51dev.dtb \
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imx51-babbage.dtb \
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imx51-eukrea-mbimxsd51-baseboard.dtb \
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imx53-ard.dtb \
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imx53-evk.dtb \
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imx53-m53evk.dtb \
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@ -0,0 +1,93 @@
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/*
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* Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#include "imx51.dtsi"
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/ {
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model = "Eukrea CPUIMX51";
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compatible = "eukrea,cpuimx51", "fsl,imx51";
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memory {
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reg = <0x90000000 0x10000000>; /* 256M */
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};
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};
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&fec {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec>;
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status = "okay";
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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pcf8563@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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};
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};
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&iomuxc {
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imx51-eukrea {
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pinctrl_tsc2007_1: tsc2007grp-1 {
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fsl,pins = <
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MX51_PAD_GPIO_NAND__GPIO_NAND 0x1f5
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MX51_PAD_NANDF_D8__GPIO4_0 0x1f5
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>;
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};
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pinctrl_fec: fecgrp {
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fsl,pins = <
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MX51_PAD_DI_GP3__FEC_TX_ER 0x80000000
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MX51_PAD_DI2_PIN4__FEC_CRS 0x80000000
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MX51_PAD_DI2_PIN2__FEC_MDC 0x80000000
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MX51_PAD_DI2_PIN3__FEC_MDIO 0x80000000
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MX51_PAD_DI2_DISP_CLK__FEC_RDATA1 0x80000000
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MX51_PAD_DI_GP4__FEC_RDATA2 0x80000000
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MX51_PAD_DISP2_DAT0__FEC_RDATA3 0x80000000
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MX51_PAD_DISP2_DAT1__FEC_RX_ER 0x80000000
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MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x80000000
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MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x80000000
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MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x80000000
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MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x80000000
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MX51_PAD_DISP2_DAT10__FEC_COL 0x80000000
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MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x80000000
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MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x80000000
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MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x80000000
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MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x80000000
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MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x80000000
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX51_PAD_SD2_CMD__I2C1_SCL 0x400001ed
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MX51_PAD_SD2_CLK__I2C1_SDA 0x400001ed
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>;
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};
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};
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};
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&nfc {
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nand-bus-width = <8>;
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nand-ecc-mode = "hw";
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nand-on-flash-bbt;
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status = "okay";
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};
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@ -0,0 +1,175 @@
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/*
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* Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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/dts-v1/;
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#include "imx51-eukrea-cpuimx51.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Eukrea CPUIMX51";
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compatible = "eukrea,mbimxsd51","eukrea,cpuimx51", "fsl,imx51";
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gpio_keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpiokeys_1>;
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button-1 {
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label = "BP1";
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gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
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linux,code = <256>;
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gpio-key,wakeup;
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linux,input-type = <1>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpioled>;
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led1 {
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label = "led1";
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gpios = <&gpio3 30 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "heartbeat";
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};
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};
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sound {
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compatible = "eukrea,asoc-tlv320";
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eukrea,model = "imx51-eukrea-tlv320aic23";
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ssi-controller = <&ssi2>;
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fsl,mux-int-port = <2>;
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fsl,mux-ext-port = <3>;
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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};
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&esdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
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fsl,cd-controller;
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status = "okay";
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};
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&i2c1 {
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tlv320aic23: codec@1a {
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compatible = "ti,tlv320aic23";
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reg = <0x1a>;
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};
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};
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&iomuxc {
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imx51-eukrea {
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pinctrl_audmux: audmuxgrp {
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fsl,pins = <
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MX51_PAD_AUD3_BB_TXD__AUD3_TXD 0x80000000
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MX51_PAD_AUD3_BB_RXD__AUD3_RXD 0x80000000
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MX51_PAD_AUD3_BB_CK__AUD3_TXC 0x80000000
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MX51_PAD_AUD3_BB_FS__AUD3_TXFS 0x80000000
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>;
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};
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pinctrl_esdhc1: esdhc1grp {
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fsl,pins = <
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MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
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MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
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MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
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MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
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MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
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MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
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MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
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>;
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};
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pinctrl_uart3: uart3grp {
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fsl,pins = <
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MX51_PAD_UART3_RXD__UART3_RXD 0x1c5
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MX51_PAD_UART3_TXD__UART3_TXD 0x1c5
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>;
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};
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pinctrl_uart3_rtscts: uart3rtsctsgrp {
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fsl,pins = <
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MX51_PAD_KEY_COL4__UART3_RTS 0x1c5
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MX51_PAD_KEY_COL5__UART3_CTS 0x1c5
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>;
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};
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pinctrl_backlight_1: backlightgrp-1 {
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fsl,pins = <
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MX51_PAD_DI1_D1_CS__GPIO3_4 0x1f5
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>;
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};
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pinctrl_esdhc1_cd: esdhc1_cd {
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fsl,pins = <
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MX51_PAD_GPIO1_0__SD1_CD 0x20d5
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>;
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};
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pinctrl_gpiokeys_1: gpiokeysgrp-1 {
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fsl,pins = <
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MX51_PAD_NANDF_D9__GPIO3_31 0x1f5
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>;
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};
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pinctrl_gpioled: gpioledgrp-1 {
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fsl,pins = <
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MX51_PAD_NANDF_D10__GPIO3_30 0x80000000
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>;
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};
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pinctrl_reg_lcd_3v3: reg_lcd_3v3 {
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fsl,pins = <
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MX51_PAD_CSI1_D9__GPIO3_13 0x1f5
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>;
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};
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};
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};
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&ssi2 {
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codec-handle = <&tlv320aic23>;
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fsl,mode = "i2s-slave";
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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fsl,uart-has-rtscts;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3 &pinctrl_uart3_rtscts>;
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fsl,uart-has-rtscts;
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status = "okay";
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};
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