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MIPS: lantiq: Convert the fpi bus driver to a platform_driver 

Instead of hacking the configuration of the FPI bus into the arch code
add an own bus driver for this internal bus. The FPI bus is the main
bus of the SoC. This bus driver makes sure the bus is configured
correctly before the child drivers are getting initialized. This driver
will probably also be used on different SoCs later.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: john@phrozen.org
Cc: p.zabel@pengutronix.de
Cc: kishon@ti.com
Cc: mark.rutland@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-watchdog@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-spi@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17122/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Hauke Mehrtens 2017-08-20 00:18:15 +02:00 committed by Ralf Baechle
parent c5aba1cdd3
commit c20b3b8019
7 changed files with 121 additions and 45 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
Documentation/devicetree/bindings/mips/lantiq/fpi-bus.txt Normal file
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@ -0,0 +1,31 @@
Lantiq XWAY SoC FPI BUS binding
============================
-------------------------------------------------------------------------------
Required properties:
- compatible : Should be one of
"lantiq,xrx200-fpi"
- reg : The address and length of the XBAR
configuration register.
Address and length of the FPI bus itself.
- lantiq,rcu : A phandle to the RCU syscon
- lantiq,offset-endianness : Offset of the endianness configuration
register
-------------------------------------------------------------------------------
Example for the FPI on the xrx200 SoCs:
fpi@10000000 {
compatible = "lantiq,xrx200-fpi";
ranges = <0x0 0x10000000 0xf000000>;
reg = <0x1f400000 0x1000>,
<0x10000000 0xf000000>;
lantiq,rcu = <&rcu0>;
lantiq,offset-endianness = <0x4c>;
#address-cells = <1>;
#size-cells = <1>;
gptu@e100a00 {
......
};
};

1
MAINTAINERS
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@ -7580,6 +7580,7 @@ M: John Crispin <john@phrozen.org>
L: linux-mips@linux-mips.org
S: Maintained
F: arch/mips/lantiq
F: drivers/soc/lantiq
LAPB module
L: linux-x25@vger.kernel.org

4
arch/mips/lantiq/xway/reset.c
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@ -373,10 +373,6 @@ static int __init mips_reboot_setup(void)
of_machine_is_compatible("lantiq,vr9"))
ltq_usb_init();
if (of_machine_is_compatible("lantiq,vr9"))
ltq_rcu_w32(ltq_rcu_r32(RCU_AHB_ENDIAN) | RCU_VR9_BE_AHB1S,
RCU_AHB_ENDIAN);
_machine_restart = ltq_machine_restart;
_machine_halt = ltq_machine_halt;
pm_power_off = ltq_machine_power_off;

41
arch/mips/lantiq/xway/sysctrl.c
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@ -145,15 +145,7 @@ static u32 pmu_clk_cr_b[] = {
#define pmu_w32(x, y) ltq_w32((x), pmu_membase + (y))
#define pmu_r32(x) ltq_r32(pmu_membase + (x))
#define XBAR_ALWAYS_LAST 0x430
#define XBAR_FPI_BURST_EN BIT(1)
#define XBAR_AHB_BURST_EN BIT(2)
#define xbar_w32(x, y) ltq_w32((x), ltq_xbar_membase + (y))
#define xbar_r32(x) ltq_r32(ltq_xbar_membase + (x))
static void __iomem *pmu_membase;
static void __iomem *ltq_xbar_membase;
void __iomem *ltq_cgu_membase;
void __iomem *ltq_ebu_membase;
@ -293,16 +285,6 @@ static void pci_ext_disable(struct clk *clk)
ltq_cgu_w32((1 << 31) | (1 << 30), pcicr);
}
static void xbar_fpi_burst_disable(void)
{
u32 reg;
/* bit 1 as 1 --burst; bit 1 as 0 -- single */
reg = xbar_r32(XBAR_ALWAYS_LAST);
reg &= ~XBAR_FPI_BURST_EN;
xbar_w32(reg, XBAR_ALWAYS_LAST);
}
/* enable a clockout source */
static int clkout_enable(struct clk *clk)
{
@ -459,26 +441,6 @@ void __init ltq_soc_init(void)
if (!pmu_membase || !ltq_cgu_membase || !ltq_ebu_membase)
panic("Failed to remap core resources");
if (of_machine_is_compatible("lantiq,vr9")) {
struct resource res_xbar;
struct device_node *np_xbar =
of_find_compatible_node(NULL, NULL,
"lantiq,xbar-xway");
if (!np_xbar)
panic("Failed to load xbar nodes from devicetree");
if (of_address_to_resource(np_xbar, 0, &res_xbar))
panic("Failed to get xbar resources");
if (!request_mem_region(res_xbar.start, resource_size(&res_xbar),
res_xbar.name))
panic("Failed to get xbar resources");
ltq_xbar_membase = ioremap_nocache(res_xbar.start,
resource_size(&res_xbar));
if (!ltq_xbar_membase)
panic("Failed to remap xbar resources");
}
/* make sure to unprotect the memory region where flash is located */
ltq_ebu_w32(ltq_ebu_r32(LTQ_EBU_BUSCON0) & ~EBU_WRDIS, LTQ_EBU_BUSCON0);
@ -605,7 +567,4 @@ void __init ltq_soc_init(void)
clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);
clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0);
}
if (of_machine_is_compatible("lantiq,vr9"))
xbar_fpi_burst_disable();
}

1
drivers/soc/Makefile
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@ -9,6 +9,7 @@ obj-$(CONFIG_ARCH_DOVE) += dove/
obj-$(CONFIG_MACH_DOVE) += dove/
obj-y += fsl/
obj-$(CONFIG_ARCH_MXC) += imx/
obj-$(CONFIG_SOC_XWAY) += lantiq/
obj-$(CONFIG_ARCH_MEDIATEK) += mediatek/
obj-$(CONFIG_ARCH_QCOM) += qcom/
obj-y += renesas/

1
drivers/soc/lantiq/Makefile Normal file
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@ -0,0 +1 @@
obj-y += fpi-bus.o

87
drivers/soc/lantiq/fpi-bus.c Normal file
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@ -0,0 +1,87 @@
/*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
* Copyright (C) 2011-2015 John Crispin <blogic@phrozen.org>
* Copyright (C) 2015 Martin Blumenstingl <martin.blumenstingl@googlemail.com>
* Copyright (C) 2017 Hauke Mehrtens <hauke@hauke-m.de>
*/
#include <linux/device.h>
#include <linux/err.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <lantiq_soc.h>
#define XBAR_ALWAYS_LAST 0x430
#define XBAR_FPI_BURST_EN BIT(1)
#define XBAR_AHB_BURST_EN BIT(2)
#define RCU_VR9_BE_AHB1S 0x00000008
static int ltq_fpi_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *np = dev->of_node;
struct resource *res_xbar;
struct regmap *rcu_regmap;
void __iomem *xbar_membase;
u32 rcu_ahb_endianness_reg_offset;
int ret;
res_xbar = platform_get_resource(pdev, IORESOURCE_MEM, 0);
xbar_membase = devm_ioremap_resource(dev, res_xbar);
if (IS_ERR(xbar_membase))
return PTR_ERR(xbar_membase);
/* RCU configuration is optional */
rcu_regmap = syscon_regmap_lookup_by_phandle(np, "lantiq,rcu");
if (IS_ERR(rcu_regmap))
return PTR_ERR(rcu_regmap);
ret = device_property_read_u32(dev, "lantiq,offset-endianness",
&rcu_ahb_endianness_reg_offset);
if (ret) {
dev_err(&pdev->dev, "Failed to get RCU reg offset\n");
return ret;
}
ret = regmap_update_bits(rcu_regmap, rcu_ahb_endianness_reg_offset,
RCU_VR9_BE_AHB1S, RCU_VR9_BE_AHB1S);
if (ret) {
dev_warn(&pdev->dev,
"Failed to configure RCU AHB endianness\n");
return ret;
}
/* disable fpi burst */
ltq_w32_mask(XBAR_FPI_BURST_EN, 0, xbar_membase + XBAR_ALWAYS_LAST);
return of_platform_populate(dev->of_node, NULL, NULL, dev);
}
static const struct of_device_id ltq_fpi_match[] = {
{ .compatible = "lantiq,xrx200-fpi" },
{},
};
MODULE_DEVICE_TABLE(of, ltq_fpi_match);
static struct platform_driver ltq_fpi_driver = {
.probe = ltq_fpi_probe,
.driver = {
.name = "fpi-xway",
.of_match_table = ltq_fpi_match,
},
};
module_platform_driver(ltq_fpi_driver);
MODULE_DESCRIPTION("Lantiq FPI bus driver");
MODULE_LICENSE("GPL");