ARM: dts: exynos: Fix invalid GIC interrupt flags in exynos5440
Interrupt of type IRQ_TYPE_NONE is not allowed for GIC interrupts and generates an error: genirq: Setting trigger mode 0 for irq 16 failed (gic_set_type+0x0/0x68) The GIC requires shared interrupts to be edge rising or level high. Platform declares support for both. Arbitrarily choose level high everywhere hoping it will work on each platform. Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Reported-by: Alban Browaeys <alban.browaeys@gmail.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com>
This commit is contained in:
Krzysztof Kozlowski
parent
eb87868a28
commit
c473c9a180
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@ -10,6 +10,7 @@
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*/
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#include <dt-bindings/clock/exynos5440.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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compatible = "samsung,exynos5440", "samsung,exynos5";
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@ -91,7 +92,7 @@ timer {
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cpufreq@160000 {
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compatible = "samsung,exynos5440-cpufreq";
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reg = <0x160000 0x1000>;
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interrupts = <0 57 0>;
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interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
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operating-points = <
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/* KHz uV */
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1500000 1100000
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@ -108,7 +109,7 @@ cpufreq@160000 {
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serial_0: serial@B0000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0xB0000 0x1000>;
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interrupts = <0 2 0>;
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interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
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clock-names = "uart", "clk_uart_baud0";
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};
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@ -116,7 +117,7 @@ serial_0: serial@B0000 {
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serial_1: serial@C0000 {
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compatible = "samsung,exynos4210-uart";
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reg = <0xC0000 0x1000>;
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interrupts = <0 3 0>;
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interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_B_125>, <&clock CLK_B_125>;
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clock-names = "uart", "clk_uart_baud0";
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};
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@ -124,7 +125,7 @@ serial_1: serial@C0000 {
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spi_0: spi@D0000 {
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compatible = "samsung,exynos5440-spi";
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reg = <0xD0000 0x100>;
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interrupts = <0 4 0>;
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interrupts = <0 4 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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samsung,spi-src-clk = <0>;
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@ -136,8 +137,14 @@ spi_0: spi@D0000 {
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pin_ctrl: pinctrl@E0000 {
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compatible = "samsung,exynos5440-pinctrl";
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reg = <0xE0000 0x1000>;
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interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>,
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<0 41 0>, <0 42 0>, <0 43 0>, <0 44 0>;
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interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>,
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<0 38 IRQ_TYPE_LEVEL_HIGH>,
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<0 39 IRQ_TYPE_LEVEL_HIGH>,
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<0 40 IRQ_TYPE_LEVEL_HIGH>,
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<0 41 IRQ_TYPE_LEVEL_HIGH>,
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<0 42 IRQ_TYPE_LEVEL_HIGH>,
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<0 43 IRQ_TYPE_LEVEL_HIGH>,
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<0 44 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <2>;
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#gpio-cells = <2>;
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@ -162,7 +169,7 @@ uart1: uart1 {
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i2c@F0000 {
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compatible = "samsung,exynos5440-i2c";
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reg = <0xF0000 0x1000>;
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interrupts = <0 5 0>;
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interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock CLK_B_125>;
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@ -172,7 +179,7 @@ i2c@F0000 {
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i2c@100000 {
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compatible = "samsung,exynos5440-i2c";
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reg = <0x100000 0x1000>;
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interrupts = <0 6 0>;
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interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&clock CLK_B_125>;
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@ -182,7 +189,7 @@ i2c@100000 {
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watchdog@110000 {
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compatible = "samsung,s3c2410-wdt";
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reg = <0x110000 0x1000>;
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interrupts = <0 1 0>;
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interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_B_125>;
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clock-names = "watchdog";
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};
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@ -209,7 +216,8 @@ amba {
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rtc@130000 {
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compatible = "samsung,s3c6410-rtc";
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reg = <0x130000 0x1000>;
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interrupts = <0 17 0>, <0 16 0>;
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interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>,
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<0 16 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_B_125>;
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clock-names = "rtc";
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};
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@ -217,7 +225,7 @@ rtc@130000 {
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tmuctrl_0: tmuctrl@160118 {
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compatible = "samsung,exynos5440-tmu";
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reg = <0x160118 0x230>, <0x160368 0x10>;
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interrupts = <0 58 0>;
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interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_B_125>;
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clock-names = "tmu_apbif";
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#include "exynos5440-tmu-sensor-conf.dtsi"
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@ -226,7 +234,7 @@ tmuctrl_0: tmuctrl@160118 {
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tmuctrl_1: tmuctrl@16011C {
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compatible = "samsung,exynos5440-tmu";
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reg = <0x16011C 0x230>, <0x160368 0x10>;
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interrupts = <0 58 0>;
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interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_B_125>;
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clock-names = "tmu_apbif";
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#include "exynos5440-tmu-sensor-conf.dtsi"
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@ -235,7 +243,7 @@ tmuctrl_1: tmuctrl@16011C {
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tmuctrl_2: tmuctrl@160120 {
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compatible = "samsung,exynos5440-tmu";
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reg = <0x160120 0x230>, <0x160368 0x10>;
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interrupts = <0 58 0>;
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interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_B_125>;
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clock-names = "tmu_apbif";
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#include "exynos5440-tmu-sensor-conf.dtsi"
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@ -259,7 +267,7 @@ cpu2_thermal: cpu2-thermal {
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sata@210000 {
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compatible = "snps,exynos5440-ahci";
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reg = <0x210000 0x10000>;
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interrupts = <0 30 0>;
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interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_SATA>;
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clock-names = "sata";
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};
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@ -267,7 +275,7 @@ sata@210000 {
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ohci@220000 {
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compatible = "samsung,exynos5440-ohci";
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reg = <0x220000 0x1000>;
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interrupts = <0 29 0>;
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interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_USB>;
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clock-names = "usbhost";
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};
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@ -275,7 +283,7 @@ ohci@220000 {
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ehci@221000 {
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compatible = "samsung,exynos5440-ehci";
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reg = <0x221000 0x1000>;
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interrupts = <0 29 0>;
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interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_USB>;
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clock-names = "usbhost";
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};
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@ -285,7 +293,9 @@ pcie_0: pcie@290000 {
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reg = <0x290000 0x1000
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0x270000 0x1000
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0x271000 0x40>;
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interrupts = <0 20 0>, <0 21 0>, <0 22 0>;
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interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>,
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<0 21 IRQ_TYPE_LEVEL_HIGH>,
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<0 22 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_PR0_250_O>, <&clock CLK_PB0_250_O>;
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clock-names = "pcie", "pcie_bus";
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#address-cells = <3>;
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@ -306,7 +316,9 @@ pcie_1: pcie@2a0000 {
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reg = <0x2a0000 0x1000
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0x272000 0x1000
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0x271040 0x40>;
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interrupts = <0 23 0>, <0 24 0>, <0 25 0>;
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interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>,
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<0 24 IRQ_TYPE_LEVEL_HIGH>,
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<0 25 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clock CLK_PR1_250_O>, <&clock CLK_PB0_250_O>;
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clock-names = "pcie", "pcie_bus";
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#address-cells = <3>;
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