Amlogic 32-bit DT changes for v4.16
- meson8: GPIO IRQ support - switch to stable UART bindings w/correct clock - add more L2 cache settings - drop unused ADC clock -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlovIOwACgkQWTcYmtP7 xmUVHQ//Q0bGpcgN9XB/2nlpFpPHuaFYphMzwDezLLHuQgbKvf7a8OoiJVYducaE P5MLVKNj6iu1xOlrbOy7BbRZ5oq4ZpLv3hmeycWt2e49L07SrSzTfMXNET1c2Pul qMeYvDfpcvO8zx7fpJOPLYypdv/d17NIleGPACNYv4y1k4ZIxaCfGES5HijIrgPA gobtl74g62CARk8QYwdlfhLpRp0ZGBOL0OaluZxJsRqwTxDR7rG9VXO6EJX2w93y zJlDbArKZ3ez2ddZq0l7CFBcngiXL/zxsLuTnJLtYBLdsfkb7pAEjYcqDpB6KObF Bfsv4BplBoY92OFDxNtzeeU323zW2AHWUZVLtzpmGL71LH9POAN5dJQ8Q6SqsWcA V5mGK/RYQzxPd2XSZGUEIvzIe0vmqg2nWdx/GkbjAaL01UI0SJUPFm0GfCL18ZCp 0nZRIMpKrpfYIg1xTcW2XAoXtNEIgE37BpN06zxAoMgy15h1Z45pZmEK5Le+oOh2 2KbHAoEbPswnWnSW4TQdSjvXSQf96+j+mKL6cP+QzzkvYfzBf/D5TKuxBZAzzcQV CFOiPfyrBw2HMwc48+FMLsvmSgotKSfilG2pAUnglpcfBglzbSpnAwfIQys6528b J/gZUWPBXqOIyxb0sGQKRHAuD2L5TqiS5OFt2eWsQ9VB+JSlAsw= =c9G5 -----END PGP SIGNATURE----- Merge tag 'amlogic-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt Pull "Amlogic 32-bit DT changes for v4.16" from Kevin Hilman: - meson8: GPIO IRQ support - switch to stable UART bindings w/correct clock - add more L2 cache settings - drop unused ADC clock * tag 'amlogic-dt' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: meson: enable MESON_IRQ_GPIO also for MACH_MESON8 ARM: dts: meson8: enable the GPIO interrupt controller ARM: dts: meson8b: use stable UART bindings with correct gate clock ARM: dts: meson8: use stable UART bindings with correct gate clock ARM: dts: meson: drop "sana" clock from SAR ADC ARM: dts: meson8: add more L2 cache settings ARM: dts: meson8b: add more L2 cache settings
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commit
c4e8db5f05
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@ -286,6 +286,11 @@ ðmac {
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clock-names = "stmmaceth";
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};
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&gpio_intc {
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compatible = "amlogic,meson8-gpio-intc", "amlogic,meson-gpio-intc";
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status = "okay";
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};
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&hwrng {
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compatible = "amlogic,meson8-rng", "amlogic,meson-rng";
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clocks = <&clkc CLKID_RNG0>;
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@ -308,6 +313,9 @@ &L2 {
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arm,data-latency = <3 3 3>;
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arm,tag-latency = <2 2 2>;
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arm,filter-ranges = <0x100000 0xc0000000>;
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prefetch-data = <1>;
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prefetch-instr = <1>;
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arm,shared-override;
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};
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&pwm_ab {
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@ -321,9 +329,8 @@ &pwm_cd {
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&saradc {
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compatible = "amlogic,meson8-saradc", "amlogic,meson-saradc";
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clocks = <&clkc CLKID_XTAL>,
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<&clkc CLKID_SAR_ADC>,
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<&clkc CLKID_SANA>;
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clock-names = "clkin", "core", "sana";
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<&clkc CLKID_SAR_ADC>;
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clock-names = "clkin", "core";
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};
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&sdio {
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@ -337,19 +344,27 @@ &spifc {
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};
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&uart_AO {
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clocks = <&clkc CLKID_CLK81>;
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compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
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clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
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clock-names = "baud", "xtal", "pclk";
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};
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&uart_A {
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clocks = <&clkc CLKID_CLK81>;
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compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
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clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>;
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clock-names = "baud", "xtal", "pclk";
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};
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&uart_B {
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clocks = <&clkc CLKID_CLK81>;
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compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
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clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>;
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clock-names = "baud", "xtal", "pclk";
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};
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&uart_C {
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clocks = <&clkc CLKID_CLK81>;
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compatible = "amlogic,meson8-uart", "amlogic,meson-uart";
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clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>;
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clock-names = "baud", "xtal", "pclk";
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};
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&usb0 {
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@ -223,6 +223,9 @@ &L2 {
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arm,data-latency = <3 3 3>;
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arm,tag-latency = <2 2 2>;
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arm,filter-ranges = <0x100000 0xc0000000>;
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prefetch-data = <1>;
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prefetch-instr = <1>;
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arm,shared-override;
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};
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&pwm_ab {
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@ -236,9 +239,8 @@ &pwm_cd {
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&saradc {
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compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
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clocks = <&clkc CLKID_XTAL>,
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<&clkc CLKID_SAR_ADC>,
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<&clkc CLKID_SANA>;
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clock-names = "clkin", "core", "sana";
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<&clkc CLKID_SAR_ADC>;
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clock-names = "clkin", "core";
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};
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&sdio {
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@ -248,19 +250,27 @@ &sdio {
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};
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&uart_AO {
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clocks = <&clkc CLKID_CLK81>;
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compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
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clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_CLK81>;
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clock-names = "baud", "xtal", "pclk";
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};
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&uart_A {
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clocks = <&clkc CLKID_CLK81>;
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compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
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clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART0>;
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clock-names = "baud", "xtal", "pclk";
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};
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&uart_B {
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clocks = <&clkc CLKID_CLK81>;
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compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
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clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART1>;
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clock-names = "baud", "xtal", "pclk";
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};
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&uart_C {
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clocks = <&clkc CLKID_CLK81>;
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compatible = "amlogic,meson8b-uart", "amlogic,meson-uart";
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clocks = <&clkc CLKID_CLK81>, <&clkc CLKID_XTAL>, <&clkc CLKID_UART2>;
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clock-names = "baud", "xtal", "pclk";
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};
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&usb0 {
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@ -23,6 +23,7 @@ config MACH_MESON8
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default ARCH_MESON
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select MESON6_TIMER
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select COMMON_CLK_MESON8B
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select MESON_IRQ_GPIO
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config MACH_MESON8B
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bool "Amlogic Meson8b SoCs support"
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