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ARM: dts: imx6sll: Specify IMX6SLL_CLK_IPG as "ipg" clock to SDMA 

Since 25aaa75df1 SDMA driver uses clock rates of "ipg" and "ahb"
clock to determine if it needs to configure the IP block as operating
at 1:1 or 1:2 clock ratio (ACR bit in SDMAARM_CONFIG). Specifying both
clocks as IMX6SLL_CLK_SDMA result in driver incorrectly thinking that
ratio is 1:1 which results in broken SDMA funtionality. Fix the code
to specify IMX6SLL_CLK_IPG as "ipg" clock for SDMA, to avoid detecting
incorrect clock ratio.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Angus Ainslie (Purism) <angus@akkea.ca>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Andrey Smirnov 2019-03-28 23:49:20 -07:00 committed by Shawn Guo
parent 7b3132ecef
commit c5ed5daa65
1 changed files with 1 additions and 1 deletions
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2
arch/arm/boot/dts/imx6sll.dtsi
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@ -621,7 +621,7 @@ sdma: dma-controller@20ec000 {
compatible = "fsl,imx6sll-sdma", "fsl,imx35-sdma"; compatible = "fsl,imx6sll-sdma", "fsl,imx35-sdma";
reg = <0x020ec000 0x4000>; reg = <0x020ec000 0x4000>;
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SLL_CLK_SDMA>, clocks = <&clks IMX6SLL_CLK_IPG>,
<&clks IMX6SLL_CLK_SDMA>; <&clks IMX6SLL_CLK_SDMA>;
clock-names = "ipg", "ahb"; clock-names = "ipg", "ahb";
#dma-cells = <3>; #dma-cells = <3>;