p71924506
/
linux_old1
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

arm64: dts: Add BRCM IPROC NAND DT node for NS2 

The NAND controller on NS2 SoC is compatible with existing
BRCM IPROC NAND driver so let's enable it in NS2 DT and
NS2 SVK DT.

This patch also fixes use of node labels in ns2-svk.dts.

Signed-off-by: Anup Patel <anup.patel@broadcom.com>
Reviewed-by: Ray Jui <rjui@broadcom.com>
Reviewed-by: Scott Branden <sbranden@broadcom.com>
Reviewed-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
This commit is contained in:
Anup Patel 2015-10-30 12:29:21 +05:30 committed by Florian Fainelli
parent 7ac674e8df
commit c6fe9a2edf
2 changed files with 34 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
arch/arm64/boot/dts/broadcom/ns2-svk.dts
View File

@ -50,18 +50,28 @@ memory {
device_type = "memory"; device_type = "memory";
reg = <0x000000000 0x80000000 0x00000000 0x40000000>; reg = <0x000000000 0x80000000 0x00000000 0x40000000>;
}; };
};
soc: soc { &i2c0 {
i2c0: i2c@66080000 { status = "ok";
status = "ok"; };
};
i2c1: i2c@660b0000 { &i2c1 {
status = "ok"; status = "ok";
}; };
uart3: serial@66130000 { &uart3 {
status = "ok"; status = "ok";
}; };
&nand {
nandcs@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-ecc-mode = "hw";
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
#address-cells = <1>;
#size-cells = <1>;
}; };
}; };

14
arch/arm64/boot/dts/broadcom/ns2.dtsi
View File

@ -212,5 +212,19 @@ hwrng: hwrng@66220000 {
compatible = "brcm,iproc-rng200"; compatible = "brcm,iproc-rng200";
reg = <0x66220000 0x28>; reg = <0x66220000 0x28>;
}; };
nand: nand@66460000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x66460000 0x600>,
<0x67015408 0x600>,
<0x66460f00 0x20>;
reg-names = "nand", "iproc-idm", "iproc-ext";
interrupts = <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
brcm,nand-has-wp;
};
}; };
}; };