MIPS: BMIPS: Add support GPIO device nodes
Adds GPIO device nodes to BCM7xxx MIPS based SoCs. Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Jonas Gorski <jonas.gorski@gmail.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: MIPS Mailing List <linux-mips@linux-mips.org> Cc: devicetree@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14001/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -197,6 +197,18 @@ pwma: pwm@406580 {
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status = "disabled";
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};
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upg_gio: gpio@406700 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x406700 0x80>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_irq0_intc>;
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interrupts = <6>;
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brcm,gpio-bank-widths = <32 32 32 18>;
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};
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ehci0: usb@488300 {
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compatible = "brcm,bcm7125-ehci", "generic-ehci";
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reg = <0x488300 0x100>;
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@ -232,6 +232,43 @@ pwmb: pwm@406800 {
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status = "disabled";
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};
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aon_pm_l2_intc: interrupt-controller@408440 {
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compatible = "brcm,l2-intc";
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reg = <0x408440 0x30>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <53>;
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brcm,irq-can-wake;
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};
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upg_gio: gpio@406700 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x406700 0x60>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_irq0_intc>;
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interrupts = <6>;
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brcm,gpio-bank-widths = <32 32 16>;
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};
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upg_gio_aon: gpio@408c00 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x408c00 0x60>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_aon_irq0_intc>;
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interrupts = <6>;
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interrupts-extended = <&upg_aon_irq0_intc 6>,
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<&aon_pm_l2_intc 5>;
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wakeup-source;
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brcm,gpio-bank-widths = <27 32 2>;
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};
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enet0: ethernet@430000 {
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phy-mode = "internal";
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phy-handle = <&phy1>;
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@ -216,6 +216,43 @@ pwmb: pwm@406700 {
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status = "disabled";
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};
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aon_pm_l2_intc: interrupt-controller@408240 {
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compatible = "brcm,l2-intc";
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reg = <0x408240 0x30>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <50>;
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brcm,irq-can-wake;
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};
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upg_gio: gpio@406500 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x406500 0xa0>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_irq0_intc>;
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interrupts = <6>;
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brcm,gpio-bank-widths = <32 32 32 29 4>;
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};
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upg_gio_aon: gpio@408c00 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x408c00 0x60>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_aon_irq0_intc>;
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interrupts = <6>;
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interrupts-extended = <&upg_aon_irq0_intc 6>,
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<&aon_pm_l2_intc 5>;
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wakeup-source;
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brcm,gpio-bank-widths = <21 32 2>;
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};
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enet0: ethernet@430000 {
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phy-mode = "internal";
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phy-handle = <&phy1>;
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@ -208,6 +208,43 @@ pwma: pwm@406400 {
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status = "disabled";
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};
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aon_pm_l2_intc: interrupt-controller@408440 {
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compatible = "brcm,l2-intc";
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reg = <0x408440 0x30>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <50>;
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brcm,irq-can-wake;
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};
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upg_gio: gpio@406500 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x406500 0xa0>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_irq0_intc>;
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interrupts = <6>;
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brcm,gpio-bank-widths = <32 32 32 29 4>;
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};
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upg_gio_aon: gpio@408c00 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x408c00 0x60>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_aon_irq0_intc>;
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interrupts = <6>;
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interrupts-extended = <&upg_aon_irq0_intc 6>,
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<&aon_pm_l2_intc 5>;
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wakeup-source;
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brcm,gpio-bank-widths = <21 32 2>;
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};
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enet0: ethernet@430000 {
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phy-mode = "internal";
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phy-handle = <&phy1>;
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@ -204,6 +204,43 @@ pwma: pwm@406400 {
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status = "disabled";
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};
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aon_pm_l2_intc: interrupt-controller@408440 {
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compatible = "brcm,l2-intc";
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reg = <0x408440 0x30>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <50>;
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brcm,irq-can-wake;
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};
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upg_gio: gpio@406500 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x406500 0xa0>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_irq0_intc>;
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interrupts = <6>;
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brcm,gpio-bank-widths = <32 32 32 29 4>;
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};
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upg_gio_aon: gpio@408c00 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x408c00 0x60>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_aon_irq0_intc>;
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interrupts = <6>;
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interrupts-extended = <&upg_aon_irq0_intc 6>,
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<&aon_pm_l2_intc 5>;
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wakeup-source;
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brcm,gpio-bank-widths = <21 32 2>;
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};
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enet0: ethernet@430000 {
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phy-mode = "internal";
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phy-handle = <&phy1>;
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@ -213,6 +213,18 @@ pwmb: pwm@406880 {
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status = "disabled";
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};
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upg_gio: gpio@406700 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x406700 0x80>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_irq0_intc>;
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interrupts = <6>;
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brcm,gpio-bank-widths = <32 32 32 27>;
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};
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enet0: ethernet@468000 {
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phy-mode = "internal";
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phy-handle = <&phy1>;
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@ -231,6 +231,43 @@ pwmb: pwm@406800 {
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status = "disabled";
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};
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aon_pm_l2_intc: interrupt-controller@408440 {
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compatible = "brcm,l2-intc";
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reg = <0x408440 0x30>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <49>;
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brcm,irq-can-wake;
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};
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upg_gio: gpio@406700 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x406700 0x80>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_irq0_intc>;
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interrupts = <6>;
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brcm,gpio-bank-widths = <32 32 32 21>;
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};
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upg_gio_aon: gpio@4094c0 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x4094c0 0x40>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_aon_irq0_intc>;
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interrupts = <6>;
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interrupts-extended = <&upg_aon_irq0_intc 6>,
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<&aon_pm_l2_intc 5>;
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wakeup-source;
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brcm,gpio-bank-widths = <18 4>;
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};
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enet0: ethernet@b80000 {
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phy-mode = "internal";
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phy-handle = <&phy1>;
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@ -246,6 +246,43 @@ pwmb: pwm@406800 {
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status = "disabled";
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};
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aon_pm_l2_intc: interrupt-controller@408440 {
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compatible = "brcm,l2-intc";
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reg = <0x408440 0x30>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&periph_intc>;
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interrupts = <54>;
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brcm,irq-can-wake;
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};
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upg_gio: gpio@406700 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x406700 0x80>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_irq0_intc>;
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interrupts = <6>;
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brcm,gpio-bank-widths = <32 32 32 21>;
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};
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upg_gio_aon: gpio@4094c0 {
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compatible = "brcm,brcmstb-gpio";
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reg = <0x4094c0 0x40>;
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#gpio-cells = <2>;
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#interrupt-cells = <2>;
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gpio-controller;
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interrupt-controller;
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interrupt-parent = <&upg_aon_irq0_intc>;
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interrupts = <6>;
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interrupts-extended = <&upg_aon_irq0_intc 6>,
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<&aon_pm_l2_intc 5>;
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wakeup-source;
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brcm,gpio-bank-widths = <18 4>;
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};
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enet0: ethernet@b80000 {
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phy-mode = "internal";
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phy-handle = <&phy1>;
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