firmware: imx: add SCU power domain driver
Some i.MX SoCs contain a system controller that is responsible for controlling the state of the IPs that are present. Communication between the host processor running an OS and the system controller happens through a SCU protocol. This patch adds SCU protocol based power domains drivers. Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: Kevin Hilman <khilman@kernel.org> Cc: linux-pm@vger.kernel.org Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
A.s. Dong
Shawn Guo
parent
0a914a4948
commit
c800cd7824
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@ -9,3 +9,9 @@ config IMX_SCU
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This driver manages the IPC interface between host CPU and the
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SCU firmware running on M4.
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config IMX_SCU_PD
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bool "IMX SCU Power Domain driver"
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depends on IMX_SCU
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help
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The System Controller Firmware (SCFW) based power domain driver.
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@ -1,2 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0
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obj-$(CONFIG_IMX_SCU) += imx-scu.o misc.o
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obj-$(CONFIG_IMX_SCU_PD) += scu-pd.o
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@ -0,0 +1,339 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2016 Freescale Semiconductor, Inc.
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* Copyright 2017-2018 NXP
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* Dong Aisheng <aisheng.dong@nxp.com>
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*
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* Implementation of the SCU based Power Domains
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*
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* NOTE: a better implementation suggested by Ulf Hansson is using a
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* single global power domain and implement the ->attach|detach_dev()
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* callback for the genpd and use the regular of_genpd_add_provider_simple().
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* From within the ->attach_dev(), we could get the OF node for
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* the device that is being attached and then parse the power-domain
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* cell containing the "resource id" and store that in the per device
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* struct generic_pm_domain_data (we have void pointer there for
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* storing these kind of things).
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*
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* Additionally, we need to implement the ->stop() and ->start()
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* callbacks of genpd, which is where you "power on/off" devices,
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* rather than using the above ->power_on|off() callbacks.
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*
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* However, there're two known issues:
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* 1. The ->attach_dev() of power domain infrastructure still does
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* not support multi domains case as the struct device *dev passed
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* in is a virtual PD device, it does not help for parsing the real
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* device resource id from device tree, so it's unware of which
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* real sub power domain of device should be attached.
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*
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* The framework needs some proper extension to support multi power
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* domain cases.
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*
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* 2. It also breaks most of current drivers as the driver probe sequence
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* behavior changed if removing ->power_on|off() callback and use
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* ->start() and ->stop() instead. genpd_dev_pm_attach will only power
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* up the domain and attach device, but will not call .start() which
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* relies on device runtime pm. That means the device power is still
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* not up before running driver probe function. For SCU enabled
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* platforms, all device drivers accessing registers/clock without power
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* domain enabled will trigger a HW access error. That means we need fix
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* most drivers probe sequence with proper runtime pm.
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*
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* In summary, we need fix above two issue before being able to switch to
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* the "single global power domain" way.
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*
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*/
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#include <dt-bindings/firmware/imx/rsrc.h>
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#include <linux/firmware/imx/sci.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/pm_domain.h>
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#include <linux/slab.h>
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/* SCU Power Mode Protocol definition */
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struct imx_sc_msg_req_set_resource_power_mode {
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struct imx_sc_rpc_msg hdr;
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u16 resource;
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u8 mode;
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} __packed;
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#define IMX_SCU_PD_NAME_SIZE 20
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struct imx_sc_pm_domain {
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struct generic_pm_domain pd;
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char name[IMX_SCU_PD_NAME_SIZE];
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u32 rsrc;
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};
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struct imx_sc_pd_range {
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char *name;
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u32 rsrc;
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u8 num;
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bool postfix;
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};
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struct imx_sc_pd_soc {
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const struct imx_sc_pd_range *pd_ranges;
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u8 num_ranges;
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};
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static const struct imx_sc_pd_range imx8qxp_scu_pd_ranges[] = {
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/* LSIO SS */
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{ "lsio-pwm", IMX_SC_R_PWM_0, 8, 1 },
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{ "lsio-gpio", IMX_SC_R_GPIO_0, 8, 1 },
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{ "lsio-gpt", IMX_SC_R_GPT_0, 5, 1 },
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{ "lsio-kpp", IMX_SC_R_KPP, 1, 0 },
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{ "lsio-fspi", IMX_SC_R_FSPI_0, 2, 1 },
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{ "lsio-mu", IMX_SC_R_MU_0A, 14, 1 },
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/* CONN SS */
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{ "con-usb", IMX_SC_R_USB_0, 2, 1 },
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{ "con-usb0phy", IMX_SC_R_USB_0_PHY, 1, 0 },
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{ "con-usb2", IMX_SC_R_USB_2, 1, 0 },
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{ "con-usb2phy", IMX_SC_R_USB_2_PHY, 1, 0 },
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{ "con-sdhc", IMX_SC_R_SDHC_0, 3, 1 },
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{ "con-enet", IMX_SC_R_ENET_0, 2, 1 },
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{ "con-nand", IMX_SC_R_NAND, 1, 0 },
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{ "con-mlb", IMX_SC_R_MLB_0, 1, 1 },
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/* Audio DMA SS */
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{ "adma-audio-pll0", IMX_SC_R_AUDIO_PLL_0, 1, 0 },
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{ "adma-audio-pll1", IMX_SC_R_AUDIO_PLL_1, 1, 0 },
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{ "adma-audio-clk-0", IMX_SC_R_AUDIO_CLK_0, 1, 0 },
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{ "adma-dma0-ch", IMX_SC_R_DMA_0_CH0, 16, 1 },
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{ "adma-dma1-ch", IMX_SC_R_DMA_1_CH0, 16, 1 },
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{ "adma-dma2-ch", IMX_SC_R_DMA_2_CH0, 5, 1 },
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{ "adma-asrc0", IMX_SC_R_ASRC_0, 1, 0 },
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{ "adma-asrc1", IMX_SC_R_ASRC_1, 1, 0 },
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{ "adma-esai0", IMX_SC_R_ESAI_0, 1, 0 },
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{ "adma-spdif0", IMX_SC_R_SPDIF_0, 1, 0 },
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{ "adma-sai", IMX_SC_R_SAI_0, 3, 1 },
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{ "adma-amix", IMX_SC_R_AMIX, 1, 0 },
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{ "adma-mqs0", IMX_SC_R_MQS_0, 1, 0 },
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{ "adma-dsp", IMX_SC_R_DSP, 1, 0 },
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{ "adma-dsp-ram", IMX_SC_R_DSP_RAM, 1, 0 },
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{ "adma-can", IMX_SC_R_CAN_0, 3, 1 },
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{ "adma-ftm", IMX_SC_R_FTM_0, 2, 1 },
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{ "adma-lpi2c", IMX_SC_R_I2C_0, 4, 1 },
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{ "adma-adc", IMX_SC_R_ADC_0, 1, 1 },
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{ "adma-lcd", IMX_SC_R_LCD_0, 1, 1 },
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{ "adma-lcd0-pwm", IMX_SC_R_LCD_0_PWM_0, 1, 1 },
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{ "adma-lpuart", IMX_SC_R_UART_0, 4, 1 },
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{ "adma-lpspi", IMX_SC_R_SPI_0, 4, 1 },
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/* VPU SS */
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{ "vpu", IMX_SC_R_VPU, 1, 0 },
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{ "vpu-pid", IMX_SC_R_VPU_PID0, 8, 1 },
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{ "vpu-dec0", IMX_SC_R_VPU_DEC_0, 1, 0 },
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{ "vpu-enc0", IMX_SC_R_VPU_ENC_0, 1, 0 },
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/* GPU SS */
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{ "gpu0-pid", IMX_SC_R_GPU_0_PID0, 4, 1 },
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/* HSIO SS */
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{ "hsio-pcie-b", IMX_SC_R_PCIE_B, 1, 0 },
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{ "hsio-serdes-1", IMX_SC_R_SERDES_1, 1, 0 },
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{ "hsio-gpio", IMX_SC_R_HSIO_GPIO, 1, 0 },
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/* MIPI/LVDS SS */
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{ "mipi0", IMX_SC_R_MIPI_0, 1, 0 },
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{ "mipi0-pwm0", IMX_SC_R_MIPI_0_PWM_0, 1, 0 },
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{ "mipi0-i2c", IMX_SC_R_MIPI_0_I2C_0, 2, 1 },
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{ "lvds0", IMX_SC_R_LVDS_0, 1, 0 },
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/* DC SS */
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{ "dc0", IMX_SC_R_DC_0, 1, 0 },
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{ "dc0-pll", IMX_SC_R_DC_0_PLL_0, 2, 1 },
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};
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static const struct imx_sc_pd_soc imx8qxp_scu_pd = {
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.pd_ranges = imx8qxp_scu_pd_ranges,
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.num_ranges = ARRAY_SIZE(imx8qxp_scu_pd_ranges),
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};
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static struct imx_sc_ipc *pm_ipc_handle;
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static inline struct imx_sc_pm_domain *
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to_imx_sc_pd(struct generic_pm_domain *genpd)
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{
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return container_of(genpd, struct imx_sc_pm_domain, pd);
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}
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static int imx_sc_pd_power(struct generic_pm_domain *domain, bool power_on)
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{
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struct imx_sc_msg_req_set_resource_power_mode msg;
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struct imx_sc_rpc_msg *hdr = &msg.hdr;
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struct imx_sc_pm_domain *pd;
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int ret;
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pd = to_imx_sc_pd(domain);
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hdr->ver = IMX_SC_RPC_VERSION;
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hdr->svc = IMX_SC_RPC_SVC_PM;
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hdr->func = IMX_SC_PM_FUNC_SET_RESOURCE_POWER_MODE;
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hdr->size = 2;
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msg.resource = pd->rsrc;
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msg.mode = power_on ? IMX_SC_PM_PW_MODE_ON : IMX_SC_PM_PW_MODE_LP;
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ret = imx_scu_call_rpc(pm_ipc_handle, &msg, true);
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if (ret)
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dev_err(&domain->dev, "failed to power %s resource %d ret %d\n",
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power_on ? "up" : "off", pd->rsrc, ret);
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return ret;
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}
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static int imx_sc_pd_power_on(struct generic_pm_domain *domain)
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{
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return imx_sc_pd_power(domain, true);
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}
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static int imx_sc_pd_power_off(struct generic_pm_domain *domain)
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{
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return imx_sc_pd_power(domain, false);
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}
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static struct generic_pm_domain *imx_scu_pd_xlate(struct of_phandle_args *spec,
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void *data)
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{
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struct generic_pm_domain *domain = ERR_PTR(-ENOENT);
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struct genpd_onecell_data *pd_data = data;
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unsigned int i;
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for (i = 0; i < pd_data->num_domains; i++) {
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struct imx_sc_pm_domain *sc_pd;
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sc_pd = to_imx_sc_pd(pd_data->domains[i]);
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if (sc_pd->rsrc == spec->args[0]) {
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domain = &sc_pd->pd;
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break;
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}
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}
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return domain;
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}
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static struct imx_sc_pm_domain *
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imx_scu_add_pm_domain(struct device *dev, int idx,
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const struct imx_sc_pd_range *pd_ranges)
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{
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struct imx_sc_pm_domain *sc_pd;
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int ret;
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sc_pd = devm_kzalloc(dev, sizeof(*sc_pd), GFP_KERNEL);
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if (!sc_pd)
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return ERR_PTR(-ENOMEM);
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sc_pd->rsrc = pd_ranges->rsrc + idx;
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sc_pd->pd.power_off = imx_sc_pd_power_off;
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sc_pd->pd.power_on = imx_sc_pd_power_on;
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if (pd_ranges->postfix)
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snprintf(sc_pd->name, sizeof(sc_pd->name),
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"%s%i", pd_ranges->name, idx);
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else
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snprintf(sc_pd->name, sizeof(sc_pd->name),
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"%s", pd_ranges->name);
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sc_pd->pd.name = sc_pd->name;
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if (sc_pd->rsrc >= IMX_SC_R_LAST) {
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dev_warn(dev, "invalid pd %s rsrc id %d found",
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sc_pd->name, sc_pd->rsrc);
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devm_kfree(dev, sc_pd);
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return NULL;
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}
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ret = pm_genpd_init(&sc_pd->pd, NULL, true);
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if (ret) {
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dev_warn(dev, "failed to init pd %s rsrc id %d",
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sc_pd->name, sc_pd->rsrc);
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devm_kfree(dev, sc_pd);
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return NULL;
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}
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return sc_pd;
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}
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static int imx_scu_init_pm_domains(struct device *dev,
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const struct imx_sc_pd_soc *pd_soc)
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{
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const struct imx_sc_pd_range *pd_ranges = pd_soc->pd_ranges;
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struct generic_pm_domain **domains;
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struct genpd_onecell_data *pd_data;
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struct imx_sc_pm_domain *sc_pd;
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u32 count = 0;
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int i, j;
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for (i = 0; i < pd_soc->num_ranges; i++)
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count += pd_ranges[i].num;
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domains = devm_kcalloc(dev, count, sizeof(*domains), GFP_KERNEL);
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if (!domains)
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return -ENOMEM;
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pd_data = devm_kzalloc(dev, sizeof(*pd_data), GFP_KERNEL);
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if (!pd_data)
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return -ENOMEM;
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count = 0;
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for (i = 0; i < pd_soc->num_ranges; i++) {
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for (j = 0; j < pd_ranges[i].num; j++) {
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sc_pd = imx_scu_add_pm_domain(dev, j, &pd_ranges[i]);
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if (IS_ERR_OR_NULL(sc_pd))
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continue;
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domains[count++] = &sc_pd->pd;
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dev_dbg(dev, "added power domain %s\n", sc_pd->pd.name);
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}
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}
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pd_data->domains = domains;
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pd_data->num_domains = count;
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pd_data->xlate = imx_scu_pd_xlate;
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of_genpd_add_provider_onecell(dev->of_node, pd_data);
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return 0;
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}
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static int imx_sc_pd_probe(struct platform_device *pdev)
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{
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const struct imx_sc_pd_soc *pd_soc;
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int ret;
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ret = imx_scu_get_handle(&pm_ipc_handle);
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if (ret)
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return ret;
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pd_soc = of_device_get_match_data(&pdev->dev);
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if (!pd_soc)
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return -ENODEV;
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return imx_scu_init_pm_domains(&pdev->dev, pd_soc);
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}
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static const struct of_device_id imx_sc_pd_match[] = {
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{ .compatible = "fsl,imx8qxp-scu-pd", &imx8qxp_scu_pd},
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{ /* sentinel */ }
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};
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static struct platform_driver imx_sc_pd_driver = {
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.driver = {
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.name = "imx-scu-pd",
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.of_match_table = imx_sc_pd_match,
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},
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.probe = imx_sc_pd_probe,
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};
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builtin_platform_driver(imx_sc_pd_driver);
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MODULE_AUTHOR("Dong Aisheng <aisheng.dong@nxp.com>");
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MODULE_DESCRIPTION("IMX SCU Power Domain driver");
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MODULE_LICENSE("GPL v2");
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