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Freescale arm64 device tree update for 4.20: 

- Add the second Dual UART device for LS208xA SoCs.
  - Add necessary big-endian property for NOR device on LS104xA based
    boards, remove unneeded big-endian property from IFC controller.
  - DTC has new checks for I2C and SPI buses to land into 4.20.  A patch
    from Rob to fix the bus node names and warnings in unit-addresses.
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Merge tag 'imx-dt64-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

Freescale arm64 device tree update for 4.20:
 - Add the second Dual UART device for LS208xA SoCs.
 - Add necessary big-endian property for NOR device on LS104xA based
   boards, remove unneeded big-endian property from IFC controller.
 - DTC has new checks for I2C and SPI buses to land into 4.20.  A patch
   from Rob to fix the bus node names and warnings in unit-addresses.

* tag 'imx-dt64-4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: fsl: Fix I2C and SPI bus warnings
  arm64: dts: ls208xa: add second duart
  arm64: dts: fsl: remove big-endian field from IFC controller
  arm64: dts: Add big-endian in nor node for ls104xa

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2018-10-02 11:41:43 +02:00
parent 476ca77f0f b739c177e1
commit ca2fbd9ad4
8 changed files with 34 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
View File

@ -337,7 +337,7 @@ i2c1: i2c@2190000 {
status = "disabled";
};
dspi: dspi@2100000 {
dspi: spi@2100000 {
compatible = "fsl,ls1012a-dspi", "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
#size-cells = <0>;

2
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dts
View File

@ -3,6 +3,7 @@
* Device Tree Include file for Freescale Layerscape-1043A family SoC.
*
* Copyright 2014-2015 Freescale Semiconductor, Inc.
* Copyright 2018 NXP
*
* Mingkai Hu <Mingkai.hu@freescale.com>
*/
@ -50,6 +51,7 @@ &ifc {
nor@0,0 {
compatible = "cfi-flash";
reg = <0x0 0x0 0x8000000>;
big-endian;
bank-width = <2>;
device-width = <1>;
};

2
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts
View File

@ -3,6 +3,7 @@
* Device Tree Include file for Freescale Layerscape-1043A family SoC.
*
* Copyright 2014-2015 Freescale Semiconductor, Inc.
* Copyright 2018 NXP
*
* Mingkai Hu <Mingkai.hu@freescale.com>
*/
@ -65,6 +66,7 @@ nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0 0x0 0x8000000>;
big-endian;
bank-width = <2>;
device-width = <1>;
};

8
arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
View File

@ -3,6 +3,7 @@
* Device Tree Include file for Freescale Layerscape-1043A family SoC.
*
* Copyright 2014-2015 Freescale Semiconductor, Inc.
* Copyright 2018 NXP
*
* Mingkai Hu <Mingkai.hu@freescale.com>
*/
@ -280,11 +281,10 @@ dcfg: dcfg@1ee0000 {
ifc: ifc@1530000 {
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x1530000 0x0 0x10000>;
big-endian;
interrupts = <0 43 0x4>;
};
qspi: quadspi@1550000 {
qspi: spi@1550000 {
compatible = "fsl,ls1043a-qspi", "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;
@ -382,7 +382,7 @@ qportals: qman-portals@500000000 {
ranges = <0x0 0x5 0x00000000 0x8000000>;
};
dspi0: dspi@2100000 {
dspi0: spi@2100000 {
compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
#size-cells = <0>;
@ -395,7 +395,7 @@ dspi0: dspi@2100000 {
status = "disabled";
};
dspi1: dspi@2110000 {
dspi1: spi@2110000 {
compatible = "fsl,ls1043a-dspi", "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
#size-cells = <0>;

2
arch/arm64/boot/dts/freescale/fsl-ls1046a-qds.dts
View File

@ -3,6 +3,7 @@
* Device Tree Include file for Freescale Layerscape-1046A family SoC.
*
* Copyright 2016 Freescale Semiconductor, Inc.
* Copyright 2018 NXP
*
* Shaohui Xie <Shaohui.Xie@nxp.com>
*/
@ -141,6 +142,7 @@ &ifc {
nor@0,0 {
compatible = "cfi-flash";
reg = <0x0 0x0 0x8000000>;
big-endian;
bank-width = <2>;
device-width = <1>;
};

4
arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
View File

@ -57,12 +57,12 @@ temp-sensor@4c {
reg = <0x4c>;
};
eeprom@56 {
eeprom@52 {
compatible = "atmel,24c512";
reg = <0x52>;
};
eeprom@57 {
eeprom@53 {
compatible = "atmel,24c512";
reg = <0x53>;
};

6
arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
View File

@ -3,6 +3,7 @@
* Device Tree Include file for Freescale Layerscape-1046A family SoC.
*
* Copyright 2016 Freescale Semiconductor, Inc.
* Copyright 2018 NXP
*
* Mingkai Hu <mingkai.hu@nxp.com>
*/
@ -198,11 +199,10 @@ ddr: memory-controller@1080000 {
ifc: ifc@1530000 {
compatible = "fsl,ifc", "simple-bus";
reg = <0x0 0x1530000 0x0 0x10000>;
big-endian;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
};
qspi: quadspi@1550000 {
qspi: spi@1550000 {
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;
@ -361,7 +361,7 @@ tmu: tmu@1f00000 {
#thermal-sensor-cells = <1>;
};
dspi: dspi@2100000 {
dspi: spi@2100000 {
compatible = "fsl,ls1021a-v1.0-dspi";
#address-cells = <1>;
#size-cells = <0>;

20
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
View File

@ -22,6 +22,8 @@ aliases {
crypto = &crypto;
serial0 = &serial0;
serial1 = &serial1;
serial2 = &serial2;
serial3 = &serial3;
};
cpu: cpus {
@ -221,6 +223,20 @@ serial1: serial@21c0600 {
interrupts = <0 32 0x4>; /* Level high type */
};
serial2: serial@21d0500 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21d0500 0x0 0x100>;
clocks = <&clockgen 4 3>;
interrupts = <0 33 0x4>; /* Level high type */
};
serial3: serial@21d0600 {
compatible = "fsl,ns16550", "ns16550a";
reg = <0x0 0x21d0600 0x0 0x100>;
clocks = <&clockgen 4 3>;
interrupts = <0 33 0x4>; /* Level high type */
};
cluster1_core0_watchdog: wdt@c000000 {
compatible = "arm,sp805-wdt", "arm,primecell";
reg = <0x0 0xc000000 0x0 0x1000>;
@ -469,7 +485,7 @@ smmu: iommu@5000000 {
mmu-masters = <&fsl_mc 0x300 0>;
};
dspi: dspi@2100000 {
dspi: spi@2100000 {
status = "disabled";
compatible = "fsl,ls2080a-dspi", "fsl,ls2085a-dspi";
#address-cells = <1>;
@ -595,7 +611,7 @@ ifc: ifc@2240000 {
3 0 0x5 0x20000000 0x00010000>;
};
qspi: quadspi@20c0000 {
qspi: spi@20c0000 {
status = "disabled";
compatible = "fsl,ls2080a-qspi", "fsl,ls1021a-qspi";
#address-cells = <1>;