drm/amdgpu: fix parsing indirect register list v2
WARN_ON possible buffer overflow and avoid unnecessary dereference. v2: change BUG_ON to WARN_ON Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1838,13 +1838,15 @@ static void gfx_v9_1_parse_ind_reg_list(int *register_list_format,
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int indirect_offset,
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int list_size,
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int *unique_indirect_regs,
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int *unique_indirect_reg_count,
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int unique_indirect_reg_count,
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int *indirect_start_offsets,
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int *indirect_start_offsets_count)
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int *indirect_start_offsets_count,
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int max_start_offsets_count)
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{
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int idx;
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for (; indirect_offset < list_size; indirect_offset++) {
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WARN_ON(*indirect_start_offsets_count >= max_start_offsets_count);
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indirect_start_offsets[*indirect_start_offsets_count] = indirect_offset;
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*indirect_start_offsets_count = *indirect_start_offsets_count + 1;
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@ -1852,14 +1854,14 @@ static void gfx_v9_1_parse_ind_reg_list(int *register_list_format,
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indirect_offset += 2;
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/* look for the matching indice */
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for (idx = 0; idx < *unique_indirect_reg_count; idx++) {
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for (idx = 0; idx < unique_indirect_reg_count; idx++) {
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if (unique_indirect_regs[idx] ==
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register_list_format[indirect_offset] ||
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!unique_indirect_regs[idx])
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break;
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}
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BUG_ON(idx >= *unique_indirect_reg_count);
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BUG_ON(idx >= unique_indirect_reg_count);
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if (!unique_indirect_regs[idx])
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unique_indirect_regs[idx] = register_list_format[indirect_offset];
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@ -1894,9 +1896,10 @@ static int gfx_v9_1_init_rlc_save_restore_list(struct amdgpu_device *adev)
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adev->gfx.rlc.reg_list_format_direct_reg_list_length,
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adev->gfx.rlc.reg_list_format_size_bytes >> 2,
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unique_indirect_regs,
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&unique_indirect_reg_count,
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unique_indirect_reg_count,
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indirect_start_offsets,
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&indirect_start_offsets_count);
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&indirect_start_offsets_count,
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ARRAY_SIZE(indirect_start_offsets));
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/* enable auto inc in case it is disabled */
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tmp = RREG32(SOC15_REG_OFFSET(GC, 0, mmRLC_SRM_CNTL));
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