wan: dscc4: use msecs_to_jiffies for conversions
API compliance scanning with coccinelle flagged: ./drivers/net/wan/dscc4.c:1036:1-33: WARNING: timeout (10) seems HZ dependent ./drivers/net/wan/dscc4.c:554:2-34: WARNING: timeout (10) seems HZ dependent ./drivers/net/wan/dscc4.c:599:2-34: WARNING: timeout (10) seems HZ dependent Numeric constants passed to schedule_timeout_*() make the effective timeout HZ dependent which does not seem to be the intent here. Fixed up by converting the constant to jiffies with msecs_to_jiffies(), passing 100ms (assuming HZ==100 in the original code). Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -551,7 +551,7 @@ static int dscc4_wait_ack_cec(struct dscc4_dev_priv *dpriv,
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msg, i);
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goto done;
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}
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schedule_timeout_uninterruptible(10);
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schedule_timeout_uninterruptible(msecs_to_jiffies(100));
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rmb();
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} while (++i > 0);
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netdev_err(dev, "%s timeout\n", msg);
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@ -596,7 +596,7 @@ static inline int dscc4_xpr_ack(struct dscc4_dev_priv *dpriv)
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(dpriv->iqtx[cur] & cpu_to_le32(Xpr)))
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break;
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smp_rmb();
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schedule_timeout_uninterruptible(10);
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schedule_timeout_uninterruptible(msecs_to_jiffies(100));
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} while (++i > 0);
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return (i >= 0 ) ? i : -EAGAIN;
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@ -1033,7 +1033,7 @@ static void dscc4_pci_reset(struct pci_dev *pdev, void __iomem *ioaddr)
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/* Flush posted writes */
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readl(ioaddr + GSTAR);
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schedule_timeout_uninterruptible(10);
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schedule_timeout_uninterruptible(msecs_to_jiffies(100));
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for (i = 0; i < 16; i++)
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pci_write_config_dword(pdev, i << 2, dscc4_pci_config_store[i]);
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