i3c: add mixed limited bus mode
The i3c bus spec defines a bus configuration where i2c devices don't have a 50ns filter but support SCL running at SDR max rate (12.5MHz). This patch introduces the limited bus mode so that users can use a higher speed in presence of i2c devices index 1. Signed-off-by: Vitor Soares <vitor.soares@synopsys.com> Cc: Boris Brezillon <bbrezillon@kernel.org> Cc: <linux-kernel@vger.kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
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@ -470,6 +470,7 @@ static int i3c_bus_init(struct i3c_bus *i3cbus)
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static const char * const i3c_bus_mode_strings[] = {
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[I3C_BUS_MODE_PURE] = "pure",
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[I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
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[I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
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[I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
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};
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@ -584,6 +585,7 @@ int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
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i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
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break;
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case I3C_BUS_MODE_MIXED_FAST:
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case I3C_BUS_MODE_MIXED_LIMITED:
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if (!i3cbus->scl_rate.i3c)
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i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
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if (!i3cbus->scl_rate.i2c)
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@ -2487,6 +2489,9 @@ int i3c_master_register(struct i3c_master_controller *master,
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mode = I3C_BUS_MODE_MIXED_FAST;
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break;
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case I3C_LVR_I2C_INDEX(1):
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if (mode < I3C_BUS_MODE_MIXED_LIMITED)
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mode = I3C_BUS_MODE_MIXED_LIMITED;
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break;
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case I3C_LVR_I2C_INDEX(2):
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if (mode < I3C_BUS_MODE_MIXED_SLOW)
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mode = I3C_BUS_MODE_MIXED_SLOW;
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@ -250,12 +250,17 @@ struct i3c_device {
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* the bus. The only impact in this mode is that the
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* high SCL pulse has to stay below 50ns to trick I2C
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* devices when transmitting I3C frames
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* @I3C_BUS_MODE_MIXED_LIMITED: I2C devices without 50ns spike filter are
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* present on the bus. However they allow
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* compliance up to the maximum SDR SCL clock
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* frequency.
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* @I3C_BUS_MODE_MIXED_SLOW: I2C devices without 50ns spike filter are present
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* on the bus
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*/
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enum i3c_bus_mode {
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I3C_BUS_MODE_PURE,
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I3C_BUS_MODE_MIXED_FAST,
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I3C_BUS_MODE_MIXED_LIMITED,
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I3C_BUS_MODE_MIXED_SLOW,
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};
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