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ARM: cache-v7: consolidate initialisation of cache level index 

Both v7_flush_cache_louis and v7_flush_dcache_all both begin the
flush_levels loop with r10 initialised to zero.  In each case, this
is done immediately prior to entering the loop.  Branch to this
instruction in v7_flush_dcache_all from v7_flush_cache_louis and
eliminate the unnecessary initialisation in v7_flush_cache_louis.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King 2015-04-03 11:21:42 +01:00
parent 47b8484ea6
commit cd8b24d9e8
1 changed files with 2 additions and 2 deletions
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4
arch/arm/mm/cache-v7.S
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@ -103,8 +103,7 @@ ALT_UP( mov r3, r0, lsr #26) @ move LoUU into position
moveqs r3, #1 << 1 @ fix LoUIS value (and set flags state to 'ne') moveqs r3, #1 << 1 @ fix LoUIS value (and set flags state to 'ne')
#endif #endif
reteq lr @ return if level == 0 reteq lr @ return if level == 0
mov r10, #0 @ r10 (starting level) = 0 b start_flush_levels @ start flushing cache levels
b flush_levels @ start flushing cache levels
ENDPROC(v7_flush_dcache_louis) ENDPROC(v7_flush_dcache_louis)
/* /*
@ -122,6 +121,7 @@ ENTRY(v7_flush_dcache_all)
mov r3, r0, lsr #23 @ move LoC into position mov r3, r0, lsr #23 @ move LoC into position
ands r3, r3, #7 << 1 @ extract LoC*2 from clidr ands r3, r3, #7 << 1 @ extract LoC*2 from clidr
beq finished @ if loc is 0, then no need to clean beq finished @ if loc is 0, then no need to clean
start_flush_levels:
mov r10, #0 @ start clean at cache level 0 mov r10, #0 @ start clean at cache level 0
flush_levels: flush_levels:
add r2, r10, r10, lsr #1 @ work out 3x current cache level add r2, r10, r10, lsr #1 @ work out 3x current cache level