cpufreq: bmips-cpufreq: CPUfreq driver for Broadcom's BMIPS SoCs
Add the MIPS CPUfreq driver. This driver currently supports CPUfreq on BMIPS5xxx-based SoCs. Signed-off-by: Markus Mayer <mmayer@broadcom.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
This commit is contained in:
Markus Mayer
Rafael J. Wysocki
parent
a8d709b065
commit
cdb56cbfd7
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@ -263,6 +263,16 @@ config IA64_ACPI_CPUFREQ
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endif
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if MIPS
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config BMIPS_CPUFREQ
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tristate "BMIPS CPUfreq Driver"
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help
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This option adds a CPUfreq driver for BMIPS processors with
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support for configurable CPU frequency.
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For now, BMIPS5 chips are supported (such as the Broadcom 7425).
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If in doubt, say N.
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config LOONGSON2_CPUFREQ
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tristate "Loongson2 CPUFreq Driver"
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help
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@ -98,6 +98,7 @@ obj-$(CONFIG_POWERNV_CPUFREQ) += powernv-cpufreq.o
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# Other platform drivers
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obj-$(CONFIG_AVR32_AT32AP_CPUFREQ) += at32ap-cpufreq.o
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obj-$(CONFIG_BFIN_CPU_FREQ) += blackfin-cpufreq.o
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obj-$(CONFIG_BMIPS_CPUFREQ) += bmips-cpufreq.o
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obj-$(CONFIG_CRIS_MACH_ARTPEC3) += cris-artpec3-cpufreq.o
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obj-$(CONFIG_ETRAXFS) += cris-etraxfs-cpufreq.o
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obj-$(CONFIG_IA64_ACPI_CPUFREQ) += ia64-acpi-cpufreq.o
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@ -0,0 +1,188 @@
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/*
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* CPU frequency scaling for Broadcom BMIPS SoCs
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*
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* Copyright (c) 2017 Broadcom
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/cpufreq.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/slab.h>
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/* for mips_hpt_frequency */
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#include <asm/time.h>
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#define BMIPS_CPUFREQ_PREFIX "bmips"
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#define BMIPS_CPUFREQ_NAME BMIPS_CPUFREQ_PREFIX "-cpufreq"
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#define TRANSITION_LATENCY (25 * 1000) /* 25 us */
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#define BMIPS5_CLK_DIV_SET_SHIFT 0x7
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#define BMIPS5_CLK_DIV_SHIFT 0x4
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#define BMIPS5_CLK_DIV_MASK 0xf
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enum bmips_type {
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BMIPS5000,
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BMIPS5200,
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};
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struct cpufreq_compat {
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const char *compatible;
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unsigned int bmips_type;
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unsigned int clk_mult;
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unsigned int max_freqs;
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};
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#define BMIPS(c, t, m, f) { \
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.compatible = c, \
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.bmips_type = (t), \
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.clk_mult = (m), \
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.max_freqs = (f), \
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}
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static struct cpufreq_compat bmips_cpufreq_compat[] = {
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BMIPS("brcm,bmips5000", BMIPS5000, 8, 4),
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BMIPS("brcm,bmips5200", BMIPS5200, 8, 4),
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{ }
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};
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static struct cpufreq_compat *priv;
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static int htp_freq_to_cpu_freq(unsigned int clk_mult)
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{
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return mips_hpt_frequency * clk_mult / 1000;
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}
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static struct cpufreq_frequency_table *
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bmips_cpufreq_get_freq_table(const struct cpufreq_policy *policy)
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{
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struct cpufreq_frequency_table *table;
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unsigned long cpu_freq;
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int i;
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cpu_freq = htp_freq_to_cpu_freq(priv->clk_mult);
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table = kmalloc((priv->max_freqs + 1) * sizeof(*table), GFP_KERNEL);
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if (!table)
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return ERR_PTR(-ENOMEM);
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for (i = 0; i < priv->max_freqs; i++) {
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table[i].frequency = cpu_freq / (1 << i);
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table[i].driver_data = i;
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}
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table[i].frequency = CPUFREQ_TABLE_END;
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return table;
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}
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static unsigned int bmips_cpufreq_get(unsigned int cpu)
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{
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unsigned int div;
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uint32_t mode;
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switch (priv->bmips_type) {
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case BMIPS5200:
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case BMIPS5000:
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mode = read_c0_brcm_mode();
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div = ((mode >> BMIPS5_CLK_DIV_SHIFT) & BMIPS5_CLK_DIV_MASK);
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break;
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default:
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div = 0;
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}
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return htp_freq_to_cpu_freq(priv->clk_mult) / (1 << div);
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}
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static int bmips_cpufreq_target_index(struct cpufreq_policy *policy,
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unsigned int index)
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{
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unsigned int div = policy->freq_table[index].driver_data;
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switch (priv->bmips_type) {
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case BMIPS5200:
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case BMIPS5000:
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change_c0_brcm_mode(BMIPS5_CLK_DIV_MASK << BMIPS5_CLK_DIV_SHIFT,
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(1 << BMIPS5_CLK_DIV_SET_SHIFT) |
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(div << BMIPS5_CLK_DIV_SHIFT));
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break;
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default:
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return -ENOTSUPP;
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}
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return 0;
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}
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static int bmips_cpufreq_exit(struct cpufreq_policy *policy)
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{
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kfree(policy->freq_table);
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return 0;
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}
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static int bmips_cpufreq_init(struct cpufreq_policy *policy)
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{
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struct cpufreq_frequency_table *freq_table;
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int ret;
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freq_table = bmips_cpufreq_get_freq_table(policy);
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if (IS_ERR(freq_table)) {
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ret = PTR_ERR(freq_table);
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pr_err("%s: couldn't determine frequency table (%d).\n",
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BMIPS_CPUFREQ_NAME, ret);
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return ret;
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}
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ret = cpufreq_generic_init(policy, freq_table, TRANSITION_LATENCY);
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if (ret)
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bmips_cpufreq_exit(policy);
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else
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pr_info("%s: registered\n", BMIPS_CPUFREQ_NAME);
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return ret;
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}
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static struct cpufreq_driver bmips_cpufreq_driver = {
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = bmips_cpufreq_target_index,
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.get = bmips_cpufreq_get,
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.init = bmips_cpufreq_init,
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.exit = bmips_cpufreq_exit,
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.attr = cpufreq_generic_attr,
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.name = BMIPS_CPUFREQ_PREFIX,
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};
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static int __init bmips_cpufreq_probe(void)
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{
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struct cpufreq_compat *cc;
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struct device_node *np;
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for (cc = bmips_cpufreq_compat; cc->compatible; cc++) {
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np = of_find_compatible_node(NULL, "cpu", cc->compatible);
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if (np) {
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of_node_put(np);
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priv = cc;
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break;
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}
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}
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/* We hit the guard element of the array. No compatible CPU found. */
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if (!cc->compatible)
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return -ENODEV;
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return cpufreq_register_driver(&bmips_cpufreq_driver);
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}
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device_initcall(bmips_cpufreq_probe);
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MODULE_AUTHOR("Markus Mayer <mmayer@broadcom.com>");
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MODULE_DESCRIPTION("CPUfreq driver for Broadcom BMIPS SoCs");
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MODULE_LICENSE("GPL");
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