lib/div64.c: off by one in shift
fls counts bits starting from 1 to 32 (returns 0 for zero argument). If
we add 1 we shift right one bit more and loose precision from divisor,
what cause function incorect results with some numbers.
Corrected code was tested in user-space, see bugzilla:
https://bugzilla.kernel.org/show_bug.cgi?id=202391
Link: http://lkml.kernel.org/r/1548686944-11891-1-git-send-email-sgruszka@redhat.com
Fixes: 658716d19f
("div64_u64(): improve precision on 32bit platforms")
Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com>
Reported-by: Siarhei Volkau <lis8215@gmail.com>
Tested-by: Siarhei Volkau <lis8215@gmail.com>
Acked-by: Oleg Nesterov <oleg@redhat.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -109,7 +109,7 @@ u64 div64_u64_rem(u64 dividend, u64 divisor, u64 *remainder)
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quot = div_u64_rem(dividend, divisor, &rem32);
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*remainder = rem32;
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} else {
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int n = 1 + fls(high);
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int n = fls(high);
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quot = div_u64(dividend >> n, divisor >> n);
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if (quot != 0)
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@ -147,7 +147,7 @@ u64 div64_u64(u64 dividend, u64 divisor)
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if (high == 0) {
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quot = div_u64(dividend, divisor);
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} else {
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int n = 1 + fls(high);
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int n = fls(high);
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quot = div_u64(dividend >> n, divisor >> n);
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if (quot != 0)
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