Merge tag 'gvt-next-2016-11-30' of https://github.com/01org/gvt-linux into drm-intel-next-fixes
From Zhenyu Wang <zhenyuw@linux.intel.com> gvt-next-2016-11-30 - initialize vgpu as primary for correct cfg space setting - fix 64 bit bar emulation - fix un-released lock issue on dispatch workload err path Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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commit
cf30f5094a
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@ -361,6 +361,8 @@ static inline void intel_vgpu_write_pci_bar(struct intel_vgpu *vgpu,
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* leave the bit 3 - bit 0 unchanged.
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*/
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*pval = (val & GENMASK(31, 4)) | (*pval & GENMASK(3, 0));
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} else {
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*pval = val;
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}
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}
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@ -177,8 +177,8 @@ static int dispatch_workload(struct intel_vgpu_workload *workload)
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rq = i915_gem_request_alloc(dev_priv->engine[ring_id], shadow_ctx);
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if (IS_ERR(rq)) {
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gvt_err("fail to allocate gem request\n");
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workload->status = PTR_ERR(rq);
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return workload->status;
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ret = PTR_ERR(rq);
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goto out;
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}
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gvt_dbg_sched("ring id %d get i915 gem request %p\n", ring_id, rq);
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@ -212,6 +212,7 @@ static int dispatch_workload(struct intel_vgpu_workload *workload)
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if (ret)
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workload->status = ret;
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if (!IS_ERR_OR_NULL(rq))
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i915_add_request_no_flush(rq);
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mutex_unlock(&dev_priv->drm.struct_mutex);
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return ret;
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@ -460,6 +461,7 @@ static int workload_thread(void *priv)
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complete_current_workload(gvt, ring_id);
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if (workload->req)
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i915_gem_request_put(fetch_and_zero(&workload->req));
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if (need_force_wake)
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@ -378,6 +378,7 @@ struct intel_vgpu *intel_gvt_create_vgpu(struct intel_gvt *gvt,
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struct intel_vgpu *vgpu;
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param.handle = 0;
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param.primary = 1;
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param.low_gm_sz = type->low_gm_size;
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param.high_gm_sz = type->high_gm_size;
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param.fence_sz = type->fence;
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