drm/i915: Invert the mask and val arguments in wa_add() and WA_REG()
While trying to unify the order of those arguments throughout the driver, Daniel noticed what we were inverting them in this part of the code. Suggested-by: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Damien Lespiau <damien.lespiau@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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@ -701,7 +701,7 @@ static int intel_ring_workarounds_emit(struct intel_engine_cs *ring,
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}
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static int wa_add(struct drm_i915_private *dev_priv,
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const u32 addr, const u32 val, const u32 mask)
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const u32 addr, const u32 mask, const u32 val)
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{
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const u32 idx = dev_priv->workarounds.count;
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@ -717,25 +717,25 @@ static int wa_add(struct drm_i915_private *dev_priv,
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return 0;
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}
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#define WA_REG(addr, val, mask) { \
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const int r = wa_add(dev_priv, (addr), (val), (mask)); \
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#define WA_REG(addr, mask, val) { \
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const int r = wa_add(dev_priv, (addr), (mask), (val)); \
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if (r) \
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return r; \
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}
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#define WA_SET_BIT_MASKED(addr, mask) \
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WA_REG(addr, _MASKED_BIT_ENABLE(mask), (mask) & 0xffff)
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WA_REG(addr, (mask) & 0xffff, _MASKED_BIT_ENABLE(mask))
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#define WA_CLR_BIT_MASKED(addr, mask) \
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WA_REG(addr, _MASKED_BIT_DISABLE(mask), (mask) & 0xffff)
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WA_REG(addr, (mask) & 0xffff, _MASKED_BIT_DISABLE(mask))
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#define WA_SET_FIELD_MASKED(addr, mask, value) \
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WA_REG(addr, _MASKED_FIELD(mask, value), mask)
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WA_REG(addr, mask, _MASKED_FIELD(mask, value))
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#define WA_SET_BIT(addr, mask) WA_REG(addr, I915_READ(addr) | (mask), mask)
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#define WA_CLR_BIT(addr, mask) WA_REG(addr, I915_READ(addr) & ~(mask), mask)
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#define WA_SET_BIT(addr, mask) WA_REG(addr, mask, I915_READ(addr) | (mask))
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#define WA_CLR_BIT(addr, mask) WA_REG(addr, mask, I915_READ(addr) & ~(mask))
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#define WA_WRITE(addr, val) WA_REG(addr, val, 0xffffffff)
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#define WA_WRITE(addr, val) WA_REG(addr, 0xffffffff, val)
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static int bdw_init_workarounds(struct intel_engine_cs *ring)
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{
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