iommu/vt-d: Use bounce buffer for untrusted devices
The Intel VT-d hardware uses paging for DMA remapping. The minimum mapped window is a page size. The device drivers may map buffers not filling the whole IOMMU window. This allows the device to access to possibly unrelated memory and a malicious device could exploit this to perform DMA attacks. To address this, the Intel IOMMU driver will use bounce pages for those buffers which don't fill whole IOMMU pages. Cc: Ashok Raj <ashok.raj@intel.com> Cc: Jacob Pan <jacob.jun.pan@linux.intel.com> Cc: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Tested-by: Xu Pengfei <pengfei.xu@intel.com> Tested-by: Mika Westerberg <mika.westerberg@intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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3b53034c26
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cfb94a372f
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@ -41,9 +41,11 @@
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#include <linux/dma-direct.h>
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#include <linux/crash_dump.h>
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#include <linux/numa.h>
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#include <linux/swiotlb.h>
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#include <asm/irq_remapping.h>
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#include <asm/cacheflush.h>
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#include <asm/iommu.h>
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#include <trace/events/intel_iommu.h>
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#include "irq_remapping.h"
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#include "intel-pasid.h"
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@ -344,6 +346,8 @@ static int domain_detach_iommu(struct dmar_domain *domain,
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static bool device_is_rmrr_locked(struct device *dev);
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static int intel_iommu_attach_device(struct iommu_domain *domain,
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struct device *dev);
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static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain,
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dma_addr_t iova);
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#ifdef CONFIG_INTEL_IOMMU_DEFAULT_ON
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int dmar_disabled = 0;
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@ -3754,6 +3758,252 @@ static const struct dma_map_ops intel_dma_ops = {
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.dma_supported = dma_direct_supported,
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};
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static void
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bounce_sync_single(struct device *dev, dma_addr_t addr, size_t size,
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enum dma_data_direction dir, enum dma_sync_target target)
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{
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struct dmar_domain *domain;
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phys_addr_t tlb_addr;
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domain = find_domain(dev);
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if (WARN_ON(!domain))
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return;
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tlb_addr = intel_iommu_iova_to_phys(&domain->domain, addr);
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if (is_swiotlb_buffer(tlb_addr))
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swiotlb_tbl_sync_single(dev, tlb_addr, size, dir, target);
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}
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static dma_addr_t
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bounce_map_single(struct device *dev, phys_addr_t paddr, size_t size,
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enum dma_data_direction dir, unsigned long attrs,
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u64 dma_mask)
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{
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size_t aligned_size = ALIGN(size, VTD_PAGE_SIZE);
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struct dmar_domain *domain;
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struct intel_iommu *iommu;
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unsigned long iova_pfn;
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unsigned long nrpages;
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phys_addr_t tlb_addr;
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int prot = 0;
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int ret;
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domain = find_domain(dev);
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if (WARN_ON(dir == DMA_NONE || !domain))
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return DMA_MAPPING_ERROR;
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iommu = domain_get_iommu(domain);
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if (WARN_ON(!iommu))
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return DMA_MAPPING_ERROR;
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nrpages = aligned_nrpages(0, size);
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iova_pfn = intel_alloc_iova(dev, domain,
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dma_to_mm_pfn(nrpages), dma_mask);
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if (!iova_pfn)
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return DMA_MAPPING_ERROR;
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/*
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* Check if DMAR supports zero-length reads on write only
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* mappings..
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*/
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if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL ||
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!cap_zlr(iommu->cap))
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prot |= DMA_PTE_READ;
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if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
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prot |= DMA_PTE_WRITE;
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/*
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* If both the physical buffer start address and size are
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* page aligned, we don't need to use a bounce page.
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*/
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if (!IS_ALIGNED(paddr | size, VTD_PAGE_SIZE)) {
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tlb_addr = swiotlb_tbl_map_single(dev,
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__phys_to_dma(dev, io_tlb_start),
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paddr, size, aligned_size, dir, attrs);
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if (tlb_addr == DMA_MAPPING_ERROR) {
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goto swiotlb_error;
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} else {
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/* Cleanup the padding area. */
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void *padding_start = phys_to_virt(tlb_addr);
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size_t padding_size = aligned_size;
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if (!(attrs & DMA_ATTR_SKIP_CPU_SYNC) &&
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(dir == DMA_TO_DEVICE ||
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dir == DMA_BIDIRECTIONAL)) {
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padding_start += size;
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padding_size -= size;
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}
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memset(padding_start, 0, padding_size);
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}
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} else {
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tlb_addr = paddr;
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}
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ret = domain_pfn_mapping(domain, mm_to_dma_pfn(iova_pfn),
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tlb_addr >> VTD_PAGE_SHIFT, nrpages, prot);
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if (ret)
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goto mapping_error;
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trace_bounce_map_single(dev, iova_pfn << PAGE_SHIFT, paddr, size);
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return (phys_addr_t)iova_pfn << PAGE_SHIFT;
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mapping_error:
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if (is_swiotlb_buffer(tlb_addr))
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swiotlb_tbl_unmap_single(dev, tlb_addr, size,
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aligned_size, dir, attrs);
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swiotlb_error:
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free_iova_fast(&domain->iovad, iova_pfn, dma_to_mm_pfn(nrpages));
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dev_err(dev, "Device bounce map: %zx@%llx dir %d --- failed\n",
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size, (unsigned long long)paddr, dir);
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return DMA_MAPPING_ERROR;
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}
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static void
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bounce_unmap_single(struct device *dev, dma_addr_t dev_addr, size_t size,
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enum dma_data_direction dir, unsigned long attrs)
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{
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size_t aligned_size = ALIGN(size, VTD_PAGE_SIZE);
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struct dmar_domain *domain;
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phys_addr_t tlb_addr;
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domain = find_domain(dev);
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if (WARN_ON(!domain))
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return;
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tlb_addr = intel_iommu_iova_to_phys(&domain->domain, dev_addr);
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if (WARN_ON(!tlb_addr))
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return;
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intel_unmap(dev, dev_addr, size);
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if (is_swiotlb_buffer(tlb_addr))
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swiotlb_tbl_unmap_single(dev, tlb_addr, size,
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aligned_size, dir, attrs);
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trace_bounce_unmap_single(dev, dev_addr, size);
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}
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static dma_addr_t
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bounce_map_page(struct device *dev, struct page *page, unsigned long offset,
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size_t size, enum dma_data_direction dir, unsigned long attrs)
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{
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return bounce_map_single(dev, page_to_phys(page) + offset,
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size, dir, attrs, *dev->dma_mask);
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}
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static dma_addr_t
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bounce_map_resource(struct device *dev, phys_addr_t phys_addr, size_t size,
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enum dma_data_direction dir, unsigned long attrs)
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{
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return bounce_map_single(dev, phys_addr, size,
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dir, attrs, *dev->dma_mask);
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}
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static void
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bounce_unmap_page(struct device *dev, dma_addr_t dev_addr, size_t size,
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enum dma_data_direction dir, unsigned long attrs)
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{
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bounce_unmap_single(dev, dev_addr, size, dir, attrs);
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}
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static void
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bounce_unmap_resource(struct device *dev, dma_addr_t dev_addr, size_t size,
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enum dma_data_direction dir, unsigned long attrs)
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{
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bounce_unmap_single(dev, dev_addr, size, dir, attrs);
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}
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static void
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bounce_unmap_sg(struct device *dev, struct scatterlist *sglist, int nelems,
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enum dma_data_direction dir, unsigned long attrs)
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{
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struct scatterlist *sg;
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int i;
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for_each_sg(sglist, sg, nelems, i)
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bounce_unmap_page(dev, sg->dma_address,
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sg_dma_len(sg), dir, attrs);
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}
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static int
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bounce_map_sg(struct device *dev, struct scatterlist *sglist, int nelems,
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enum dma_data_direction dir, unsigned long attrs)
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{
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int i;
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struct scatterlist *sg;
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for_each_sg(sglist, sg, nelems, i) {
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sg->dma_address = bounce_map_page(dev, sg_page(sg),
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sg->offset, sg->length,
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dir, attrs);
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if (sg->dma_address == DMA_MAPPING_ERROR)
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goto out_unmap;
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sg_dma_len(sg) = sg->length;
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}
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return nelems;
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out_unmap:
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bounce_unmap_sg(dev, sglist, i, dir, attrs | DMA_ATTR_SKIP_CPU_SYNC);
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return 0;
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}
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static void
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bounce_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
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size_t size, enum dma_data_direction dir)
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{
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bounce_sync_single(dev, addr, size, dir, SYNC_FOR_CPU);
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}
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static void
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bounce_sync_single_for_device(struct device *dev, dma_addr_t addr,
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size_t size, enum dma_data_direction dir)
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{
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bounce_sync_single(dev, addr, size, dir, SYNC_FOR_DEVICE);
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}
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static void
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bounce_sync_sg_for_cpu(struct device *dev, struct scatterlist *sglist,
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int nelems, enum dma_data_direction dir)
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{
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struct scatterlist *sg;
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int i;
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for_each_sg(sglist, sg, nelems, i)
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bounce_sync_single(dev, sg_dma_address(sg),
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sg_dma_len(sg), dir, SYNC_FOR_CPU);
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}
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static void
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bounce_sync_sg_for_device(struct device *dev, struct scatterlist *sglist,
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int nelems, enum dma_data_direction dir)
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{
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struct scatterlist *sg;
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int i;
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for_each_sg(sglist, sg, nelems, i)
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bounce_sync_single(dev, sg_dma_address(sg),
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sg_dma_len(sg), dir, SYNC_FOR_DEVICE);
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}
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static const struct dma_map_ops bounce_dma_ops = {
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.alloc = intel_alloc_coherent,
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.free = intel_free_coherent,
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.map_sg = bounce_map_sg,
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.unmap_sg = bounce_unmap_sg,
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.map_page = bounce_map_page,
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.unmap_page = bounce_unmap_page,
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.sync_single_for_cpu = bounce_sync_single_for_cpu,
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.sync_single_for_device = bounce_sync_single_for_device,
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.sync_sg_for_cpu = bounce_sync_sg_for_cpu,
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.sync_sg_for_device = bounce_sync_sg_for_device,
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.map_resource = bounce_map_resource,
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.unmap_resource = bounce_unmap_resource,
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.dma_supported = dma_direct_supported,
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};
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static inline int iommu_domain_cache_init(void)
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{
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int ret = 0;
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@ -5325,6 +5575,11 @@ static int intel_iommu_add_device(struct device *dev)
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}
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}
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if (device_needs_bounce(dev)) {
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dev_info(dev, "Use Intel IOMMU bounce page dma_ops\n");
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set_dma_ops(dev, &bounce_dma_ops);
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}
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return 0;
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}
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@ -5342,6 +5597,9 @@ static void intel_iommu_remove_device(struct device *dev)
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iommu_group_remove_device(dev);
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iommu_device_unlink(&iommu->iommu, dev);
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if (device_needs_bounce(dev))
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set_dma_ops(dev, NULL);
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}
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static void intel_iommu_get_resv_regions(struct device *device,
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