dmaengine: change alignment of mux_configure32 and fsl_edma_chan_mux
The alignment of mux_configure32() and fsl_edma_chan_mux() need
to be adjusted, it must start precisely at the first column after
the openning parenthesis of the first line.
Fixes: 9d831528a6
("dmaengine: fsl-edma: extract common fsl-edma code (no changes in behavior intended)")
Signed-off-by: Mao Wenan <maowenan@huawei.com>
Link: https://lore.kernel.org/r/20190814072105.144107-3-maowenan@huawei.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
parent
4f48e29f76
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@ -91,7 +91,7 @@ static void mux_configure8(struct fsl_edma_chan *fsl_chan, void __iomem *addr,
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}
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static void mux_configure32(struct fsl_edma_chan *fsl_chan, void __iomem *addr,
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u32 off, u32 slot, bool enable)
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u32 off, u32 slot, bool enable)
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{
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u32 val;
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@ -104,7 +104,7 @@ static void mux_configure32(struct fsl_edma_chan *fsl_chan, void __iomem *addr,
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}
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void fsl_edma_chan_mux(struct fsl_edma_chan *fsl_chan,
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unsigned int slot, bool enable)
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unsigned int slot, bool enable)
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{
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u32 ch = fsl_chan->vchan.chan.chan_id;
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void __iomem *muxaddr;
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