Merge branch 'drm-atmel-hlcdc-devel' of https://github.com/bbrezillon/linux-at91 into drm-next
The following PR add support for 3 more atmel SoCs and for some missing features (new input formats and PRIME support). * 'drm-atmel-hlcdc-devel' of https://github.com/bbrezillon/linux-at91: drm: atmel-hlcdc: add support for sama5d4 SoCs drm: atmel-hlcdc: add support for at91sam9n12 SoC drm: atmel-hlcdc: add support for at91sam9x5 SoCs drm: atmel-hlcdc: add RGB565 and RGB444 output support drm: atmel-hlcdc: add the missing DRM_ATOMIC flag drm: atmel-hlcdc: add PRIME support
This commit is contained in:
Dave Airlie
commit
d072f46544
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@ -29,6 +29,115 @@
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#define ATMEL_HLCDC_LAYER_IRQS_OFFSET 8
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static const struct atmel_hlcdc_layer_desc atmel_hlcdc_at91sam9n12_layers[] = {
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{
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.name = "base",
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.formats = &atmel_hlcdc_plane_rgb_formats,
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.regs_offset = 0x40,
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.id = 0,
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.type = ATMEL_HLCDC_BASE_LAYER,
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.nconfigs = 5,
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.layout = {
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.xstride = { 2 },
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.default_color = 3,
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.general_config = 4,
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},
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},
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};
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static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_at91sam9n12 = {
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.min_width = 0,
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.min_height = 0,
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.max_width = 1280,
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.max_height = 860,
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.nlayers = ARRAY_SIZE(atmel_hlcdc_at91sam9n12_layers),
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.layers = atmel_hlcdc_at91sam9n12_layers,
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};
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static const struct atmel_hlcdc_layer_desc atmel_hlcdc_at91sam9x5_layers[] = {
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{
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.name = "base",
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.formats = &atmel_hlcdc_plane_rgb_formats,
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.regs_offset = 0x40,
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.id = 0,
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.type = ATMEL_HLCDC_BASE_LAYER,
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.nconfigs = 5,
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.layout = {
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.xstride = { 2 },
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.default_color = 3,
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.general_config = 4,
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.disc_pos = 5,
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.disc_size = 6,
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},
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},
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{
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.name = "overlay1",
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.formats = &atmel_hlcdc_plane_rgb_formats,
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.regs_offset = 0x100,
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.id = 1,
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.type = ATMEL_HLCDC_OVERLAY_LAYER,
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.nconfigs = 10,
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.layout = {
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.pos = 2,
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.size = 3,
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.xstride = { 4 },
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.pstride = { 5 },
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.default_color = 6,
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.chroma_key = 7,
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.chroma_key_mask = 8,
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.general_config = 9,
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},
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},
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{
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.name = "high-end-overlay",
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.formats = &atmel_hlcdc_plane_rgb_and_yuv_formats,
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.regs_offset = 0x280,
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.id = 2,
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.type = ATMEL_HLCDC_OVERLAY_LAYER,
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.nconfigs = 17,
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.layout = {
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.pos = 2,
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.size = 3,
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.memsize = 4,
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.xstride = { 5, 7 },
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.pstride = { 6, 8 },
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.default_color = 9,
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.chroma_key = 10,
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.chroma_key_mask = 11,
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.general_config = 12,
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.csc = 14,
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},
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},
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{
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.name = "cursor",
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.formats = &atmel_hlcdc_plane_rgb_formats,
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.regs_offset = 0x340,
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.id = 3,
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.type = ATMEL_HLCDC_CURSOR_LAYER,
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.nconfigs = 10,
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.max_width = 128,
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.max_height = 128,
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.layout = {
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.pos = 2,
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.size = 3,
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.xstride = { 4 },
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.default_color = 6,
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.chroma_key = 7,
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.chroma_key_mask = 8,
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.general_config = 9,
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},
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},
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};
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static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_at91sam9x5 = {
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.min_width = 0,
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.min_height = 0,
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.max_width = 800,
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.max_height = 600,
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.nlayers = ARRAY_SIZE(atmel_hlcdc_at91sam9x5_layers),
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.layers = atmel_hlcdc_at91sam9x5_layers,
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};
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static const struct atmel_hlcdc_layer_desc atmel_hlcdc_sama5d3_layers[] = {
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{
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.name = "base",
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@ -132,11 +241,105 @@ static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sama5d3 = {
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.layers = atmel_hlcdc_sama5d3_layers,
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};
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static const struct atmel_hlcdc_layer_desc atmel_hlcdc_sama5d4_layers[] = {
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{
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.name = "base",
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.formats = &atmel_hlcdc_plane_rgb_formats,
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.regs_offset = 0x40,
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.id = 0,
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.type = ATMEL_HLCDC_BASE_LAYER,
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.nconfigs = 7,
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.layout = {
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.xstride = { 2 },
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.default_color = 3,
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.general_config = 4,
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.disc_pos = 5,
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.disc_size = 6,
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},
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},
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{
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.name = "overlay1",
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.formats = &atmel_hlcdc_plane_rgb_formats,
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.regs_offset = 0x140,
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.id = 1,
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.type = ATMEL_HLCDC_OVERLAY_LAYER,
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.nconfigs = 10,
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.layout = {
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.pos = 2,
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.size = 3,
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.xstride = { 4 },
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.pstride = { 5 },
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.default_color = 6,
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.chroma_key = 7,
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.chroma_key_mask = 8,
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.general_config = 9,
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},
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},
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{
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.name = "overlay2",
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.formats = &atmel_hlcdc_plane_rgb_formats,
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.regs_offset = 0x240,
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.id = 2,
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.type = ATMEL_HLCDC_OVERLAY_LAYER,
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.nconfigs = 10,
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.layout = {
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.pos = 2,
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.size = 3,
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.xstride = { 4 },
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.pstride = { 5 },
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.default_color = 6,
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.chroma_key = 7,
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.chroma_key_mask = 8,
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.general_config = 9,
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},
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},
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{
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.name = "high-end-overlay",
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.formats = &atmel_hlcdc_plane_rgb_and_yuv_formats,
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.regs_offset = 0x340,
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.id = 3,
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.type = ATMEL_HLCDC_OVERLAY_LAYER,
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.nconfigs = 42,
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.layout = {
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.pos = 2,
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.size = 3,
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.memsize = 4,
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.xstride = { 5, 7 },
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.pstride = { 6, 8 },
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.default_color = 9,
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.chroma_key = 10,
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.chroma_key_mask = 11,
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.general_config = 12,
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.csc = 14,
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},
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},
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};
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static const struct atmel_hlcdc_dc_desc atmel_hlcdc_dc_sama5d4 = {
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.min_width = 0,
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.min_height = 0,
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.max_width = 2048,
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.max_height = 2048,
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.nlayers = ARRAY_SIZE(atmel_hlcdc_sama5d4_layers),
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.layers = atmel_hlcdc_sama5d4_layers,
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};
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static const struct of_device_id atmel_hlcdc_of_match[] = {
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{
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.compatible = "atmel,at91sam9n12-hlcdc",
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.data = &atmel_hlcdc_dc_at91sam9n12,
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},
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{
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.compatible = "atmel,at91sam9x5-hlcdc",
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.data = &atmel_hlcdc_dc_at91sam9x5,
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},
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{
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.compatible = "atmel,sama5d3-hlcdc",
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.data = &atmel_hlcdc_dc_sama5d3,
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},
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{
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.compatible = "atmel,sama5d4-hlcdc",
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.data = &atmel_hlcdc_dc_sama5d4,
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},
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{ /* sentinel */ },
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};
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@ -485,7 +688,9 @@ static const struct file_operations fops = {
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};
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static struct drm_driver atmel_hlcdc_dc_driver = {
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.driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM | DRIVER_MODESET,
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.driver_features = DRIVER_HAVE_IRQ | DRIVER_GEM |
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DRIVER_MODESET | DRIVER_PRIME |
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DRIVER_ATOMIC,
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.preclose = atmel_hlcdc_dc_preclose,
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.lastclose = atmel_hlcdc_dc_lastclose,
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.irq_handler = atmel_hlcdc_dc_irq_handler,
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@ -497,6 +702,15 @@ static struct drm_driver atmel_hlcdc_dc_driver = {
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.disable_vblank = atmel_hlcdc_dc_disable_vblank,
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.gem_free_object = drm_gem_cma_free_object,
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.gem_vm_ops = &drm_gem_cma_vm_ops,
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.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
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.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
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.gem_prime_import = drm_gem_prime_import,
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.gem_prime_export = drm_gem_prime_export,
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.gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
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.gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
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.gem_prime_vmap = drm_gem_cma_prime_vmap,
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.gem_prime_vunmap = drm_gem_cma_prime_vunmap,
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.gem_prime_mmap = drm_gem_cma_prime_mmap,
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.dumb_create = drm_gem_cma_dumb_create,
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.dumb_map_offset = drm_gem_cma_dumb_map_offset,
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.dumb_destroy = drm_gem_dumb_destroy,
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@ -126,12 +126,16 @@ atmel_hlcdc_rgb_encoder_mode_set(struct drm_encoder *encoder,
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if (info->num_bus_formats) {
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switch (info->bus_formats[0]) {
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case MEDIA_BUS_FMT_RGB565_1X16:
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cfg |= ATMEL_HLCDC_CONNECTOR_RGB565 << 8;
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break;
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case MEDIA_BUS_FMT_RGB666_1X18:
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cfg |= ATMEL_HLCDC_CONNECTOR_RGB666 << 8;
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break;
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case MEDIA_BUS_FMT_RGB888_1X24:
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cfg |= ATMEL_HLCDC_CONNECTOR_RGB888 << 8;
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break;
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case MEDIA_BUS_FMT_RGB444_1X12:
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default:
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break;
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}
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