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AT91 DT for 4.19: 

- New boards from Laird: WB45N, WB50N, SOM60 modules and DVK, Gatwick
  - fix the PMC compatibles
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Merge tag 'at91-ab-4.19-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/dt

AT91 DT for 4.19:

 - New boards from Laird: WB45N, WB50N, SOM60 modules and DVK, Gatwick
 - fix the PMC compatibles

* tag 'at91-ab-4.19-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
  ARM: dts: at91: fix typos for SSC TD functions
  ARM: dts: add support for Laird SOM60 module and DVK boards
  ARM: dts: add support for Gatwick board based on WB50N
  ARM: dts: add support for Laird WB50N cpu module and DVK
  ARM: dts: add support for Laird WB45N cpu module and DVK
  ARM: dts: at91: add labels to soc dtsi for derivative boards
  dt-bindings: add laird and giantec vendor prefix
  ARM: dts: fix PMC compatible
  ARM: at91: fix USB clock detection handling
  dt-bindings: clk: at91: Document all the PMC compatibles
  dt-bindings: arm: remove PMC bindings

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2018-07-21 14:30:08 -07:00
parent 945d004788 c8cbc1c20c
commit d15d9e323c
21 changed files with 1263 additions and 33 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
Documentation/devicetree/bindings/arm/atmel-pmc.txt
View File

@ -1,14 +0,0 @@
* Power Management Controller (PMC)
Required properties:
- compatible: Should be "atmel,<chip>-pmc".
<chip> can be: at91rm9200, at91sam9260, at91sam9g45, at91sam9n12,
at91sam9x5, sama5d3
- reg: Should contain PMC registers location and length
Examples:
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-pmc";
reg = <0xfffffc00 0x100>;
};

9
Documentation/devicetree/bindings/clock/at91-clock.txt
View File

@ -17,14 +17,13 @@ Required properties:
"atmel,at91sam9x5-clk-slow-rc-osc":
at91 internal slow RC oscillator
"atmel,at91rm9200-pmc" or
"atmel,at91sam9g45-pmc" or
"atmel,at91sam9n12-pmc" or
"atmel,at91sam9x5-pmc" or
"atmel,sama5d3-pmc":
"atmel,<chip>-pmc":
at91 PMC (Power Management Controller)
All at91 specific clocks (clocks defined below) must be child
node of the PMC node.
<chip> can be: at91rm9200, at91sam9260, at91sam9261,
at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9x5,
sama5d2, sama5d3 or sama5d4.
"atmel,at91sam9x5-clk-slow" (under sckc node)
or

2
Documentation/devicetree/bindings/vendor-prefixes.txt
View File

@ -136,6 +136,7 @@ geekbuying GeekBuying
gef GE Fanuc Intelligent Platforms Embedded Systems, Inc.
GEFanuc GE Fanuc Intelligent Platforms Embedded Systems, Inc.
geniatech Geniatech, Inc.
giantec Giantec Semiconductor, Inc.
giantplus Giantplus Technology Co., Ltd.
globalscale Globalscale Technologies, Inc.
gmt Global Mixed-mode Technology, Inc.
@ -193,6 +194,7 @@ koe Kaohsiung Opto-Electronics Inc.
kosagi Sutajio Ko-Usagi PTE Ltd.
kyo Kyocera Corporation
lacie LaCie
laird Laird PLC
lantiq Lantiq Semiconductor
lattice Lattice Semiconductor
lego LEGO Systems A/S

4
arch/arm/boot/dts/Makefile
View File

@ -38,6 +38,7 @@ dtb-$(CONFIG_SOC_AT91SAM9) += \
at91-ariettag25.dtb \
at91-cosino_mega2560.dtb \
at91-kizboxmini.dtb \
at91-wb45n.dtb \
at91sam9g15ek.dtb \
at91sam9g25ek.dtb \
at91sam9g35ek.dtb \
@ -50,7 +51,10 @@ dtb-$(CONFIG_SOC_SAM_V7) += \
at91-sama5d2_ptc_ek.dtb \
at91-sama5d2_xplained.dtb \
at91-sama5d3_xplained.dtb \
at91-dvk_som60.dtb \
at91-gatwick.dtb \
at91-tse850-3.dtb \
at91-wb50n.dtb \
sama5d31ek.dtb \
sama5d33ek.dtb \
sama5d34ek.dtb \

95
arch/arm/boot/dts/at91-dvk_som60.dts Normal file
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@ -0,0 +1,95 @@
// SPDX-License-Identifier: GPL-2.0
/*
* at91-dvk_som60.dts - Device Tree file for the DVK SOM60 board
*
* Copyright (C) 2018 Laird,
* 2018 Ben Whitten <ben.whitten@lairdtech.com>
*
*/
/dts-v1/;
#include "at91-som60.dtsi"
#include "at91-dvk_su60_somc.dtsi"
#include "at91-dvk_su60_somc_lcm.dtsi"
/ {
model = "Laird DVK SOM60";
compatible = "laird,dvk-som60", "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
chosen {
stdout-path = &dbgu;
tick-timer = &pit;
};
};
&mmc0 {
status = "okay";
};
&spi0 {
status = "okay";
};
&ssc0 {
status = "okay";
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
};
&usart1 {
status = "okay";
};
&usart2 {
status = "okay";
};
&usart3 {
status = "okay";
};
&uart0 {
status = "okay";
};
&dbgu {
status = "okay";
};
&pit {
status = "okay";
};
&adc0 {
status = "okay";
};
&can1 {
status = "okay";
};
&macb0 {
status = "okay";
};
&macb1 {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
&usb2 {
status = "okay";
};

159
arch/arm/boot/dts/at91-dvk_su60_somc.dtsi Normal file
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@ -0,0 +1,159 @@
// SPDX-License-Identifier: GPL-2.0
/*
* at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base board
*
* Copyright (C) 2018 Laird,
* 2018 Ben Whitten <ben.whitten@lairdtech.com>
*
*/
/ {
sound {
compatible = "atmel,asoc-wm8904";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
atmel,model = "wm8904 @ DVK-SOM60";
atmel,audio-routing =
"Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"IN2L", "Line In Jack",
"IN2R", "Line In Jack",
"Mic", "MICBIAS",
"IN1L", "Mic";
atmel,ssc-controller = <&ssc0>;
atmel,audio-codec = <&wm8904>;
status = "okay";
};
};
&mmc0 {
status = "okay";
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
slot@0 {
bus-width = <4>;
cd-gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
cd-inverted;
};
};
&spi0 {
status = "okay";
/* spi0.0: 4M Flash Macronix MX25R4035FM1IL0 */
spi-flash@0 {
compatible = "mxicy,mx25u4035", "jedec,spi-nor";
spi-max-frequency = <33000000>;
reg = <0>;
};
};
&ssc0 {
atmel,clk-from-rk-pin;
status = "okay";
};
&i2c0 {
status = "okay";
wm8904: wm8904@1a {
compatible = "wlf,wm8904";
reg = <0x1a>;
clocks = <&pck2>;
clock-names = "mclk";
};
};
&i2c1 {
status = "okay";
eeprom@87 {
compatible = "giantec,gt24c32a", "atmel,24c32";
reg = <87>;
pagesize = <32>;
};
};
&usart1 {
status = "okay";
};
&usart2 {
status = "okay";
};
&usart3 {
status = "okay";
};
&uart0 {
status = "okay";
};
&dbgu {
status = "okay";
};
&pit {
status = "okay";
};
&adc0 {
status = "okay";
};
&can1 {
status = "okay";
};
&macb0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
ethernet-phy@7 {
reg = <7>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_geth_int>;
interrupt-parent = <&pioB>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
txen-skew-ps = <800>;
txc-skew-ps = <3000>;
rxdv-skew-ps = <400>;
rxc-skew-ps = <3000>;
rxd0-skew-ps = <400>;
rxd1-skew-ps = <400>;
rxd2-skew-ps = <400>;
rxd3-skew-ps = <400>;
};
};
&macb1 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
ethernet-phy@1 {
reg = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eth_int>;
interrupt-parent = <&pioC>;
interrupts = <10 IRQ_TYPE_EDGE_FALLING>;
};
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
&usb2 {
status = "okay";
};

90
arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi Normal file
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@ -0,0 +1,90 @@
// SPDX-License-Identifier: GPL-2.0
/*
* at91-dvk_su60_somc_lcm.dtsi - Device Tree file for the DVK SOM60 LCD board
*
* Copyright (C) 2018 Laird,
* 2018 Ben Whitten <ben.whitten@lairdtech.com>
*
*/
/ {
backlight: backlight {
compatible = "pwm-backlight";
pwms = <&hlcdc_pwm 0 50000 0>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
status = "okay";
};
panel: panel {
compatible = "winstar,wf70gtiagdng0", "innolux,at070tn92", "simple-panel";
backlight = <&backlight>;
power-supply = <&vcc_lcd_reg>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
panel_input: endpoint@0 {
reg = <0>;
remote-endpoint = <&hlcdc_panel_output>;
};
};
};
vcc_lcd_reg: fixedregulator_lcd {
compatible = "regulator-fixed";
regulator-name = "VCC LCM";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
status = "okay";
};
};
&pinctrl {
board {
pinctrl_lcd_ctp_int: lcd_ctp_int {
atmel,pins =
<AT91_PIOC 28 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
};
};
};
&i2c1 {
status = "okay";
ft5426@56 {
compatible = "focaltech,ft5426", "edt,edt-ft5406";
reg = <56>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_ctp_int>;
interrupt-parent = <&pioC>;
interrupts = <28 IRQ_TYPE_EDGE_FALLING>;
touchscreen-size-x = <800>;
touchscreen-size-y = <480>;
};
};
&hlcdc {
status = "okay";
hlcdc-display-controller {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd_base &pinctrl_lcd_rgb888>;
port@0 {
hlcdc_panel_output: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_input>;
};
};
};
};

121
arch/arm/boot/dts/at91-gatwick.dts Normal file
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@ -0,0 +1,121 @@
// SPDX-License-Identifier: GPL-2.0
/*
* at91-gatwick.dts - Device Tree file for the Gatwick board
*
* Copyright (C) 2018 Laird
*
*/
/dts-v1/;
#include "at91-wb50n.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "Laird Workgroup Bridge 50N - Project Gatwick";
compatible = "laird,gatwick", "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
gpio_keys {
compatible = "gpio-keys";
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_key_gpio>;
reset-button {
label = "Reset Button";
linux,code = <KEY_SETUP>;
gpios = <&pioE 31 GPIO_ACTIVE_LOW>;
wakeup-source;
};
};
leds {
compatible = "gpio-leds";
ethernet {
label = "gatwick:yellow:ethernet";
gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
default-state = "off";
};
wifi {
label = "gatwick:green:wifi";
gpios = <&pioA 28 GPIO_ACTIVE_LOW>;
default-state = "off";
};
ble {
label = "gatwick:blue:ble";
gpios = <&pioA 22 GPIO_ACTIVE_LOW>;
default-state = "off";
};
lora {
label = "gatwick:orange:lora";
gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
default-state = "off";
};
blank {
label = "gatwick:green:blank";
gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
default-state = "off";
};
user {
label = "gatwick:yellow:user";
gpios = <&pioA 12 GPIO_ACTIVE_LOW>;
default-state = "off";
};
};
};
&pinctrl {
board {
pinctrl_key_gpio: key_gpio_0 {
atmel,pins =
<AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PE31 GPIO with pullup deglitch */
};
};
};
&mmc0 {
status = "okay";
};
&macb1 {
status = "okay";
};
&dbgu {
status = "okay";
};
/* FTDI USART */
&usart0 {
status = "okay";
};
/* GPS USART */
&usart1 {
pinctrl-0 = <&pinctrl_usart1>;
status = "okay";
};
&spi1 {
status = "okay";
spidev@0 {
compatible = "semtech,sx1301";
reg = <0>;
spi-max-frequency = <8000000>;
};
};
&usb1 {
status = "okay";
/delete-property/atmel,oc-gpio;
};
&usb2 {
status = "okay";
};

230
arch/arm/boot/dts/at91-som60.dtsi Normal file
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@ -0,0 +1,230 @@
// SPDX-License-Identifier: GPL-2.0
/*
* at91-som60.dtsi - Device Tree file for the SOM60 module
*
* Copyright (C) 2018 Laird,
* 2018 Ben Whitten <ben.whitten@lairdtech.com>
*
*/
#include "sama5d36.dtsi"
/ {
model = "Laird SOM60";
compatible = "laird,som60", "atmel,sama5d36", "atmel,sama5d3", "atmel,sama5";
chosen {
stdout-path = &dbgu;
};
memory {
reg = <0x20000000 0x8000000>;
};
clocks {
slow_xtal {
clock-frequency = <32768>;
};
main_xtal {
clock-frequency = <12000000>;
};
};
};
&pinctrl {
board {
pinctrl_mmc0_cd: mmc0_cd {
atmel,pins =
<AT91_PIOE 31 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
};
pinctrl_mmc0_en: mmc0_en {
atmel,pins =
<AT91_PIOE 30 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
};
pinctrl_nand0_wp: nand0_wp {
atmel,pins =
<AT91_PIOE 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
};
pinctrl_usb_vbus: usb_vbus {
atmel,pins =
<AT91_PIOE 20 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>;
/* Conflicts with USART2_SCK */
};
pinctrl_usart2_sck: usart2_sck {
atmel,pins =
<AT91_PIOE 20 AT91_PERIPH_B AT91_PINCTRL_NONE>;
/* Conflicts with USB_VBUS */
};
pinctrl_usb_oc: usb_oc {
atmel,pins =
<AT91_PIOE 15 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
/* Conflicts with USART3_SCK */
};
pinctrl_usart3_sck: usart3_sck {
atmel,pins =
<AT91_PIOE 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
/* Conflicts with USB_OC */
};
pinctrl_usba_vbus: usba_vbus {
atmel,pins =
<AT91_PIOC 14 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
};
pinctrl_geth_int: geth_int {
atmel,pins =
<AT91_PIOB 25 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
/* Conflicts with USART1_SCK */
};
pinctrl_usart1_sck: usart1_sck {
atmel,pins =
<AT91_PIOB 25 AT91_PERIPH_A AT91_PINCTRL_NONE>;
/* Conflicts with GETH_INT */
};
pinctrl_eth_int: eth_int {
atmel,pins =
<AT91_PIOC 10 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>;
};
pinctrl_pck2_as_audio_mck: pck2_as_audio_mck {
atmel,pins =
<AT91_PIOC 15 AT91_PERIPH_B AT91_PINCTRL_NONE>;
};
};
};
&mmc0 {
slot@0 {
reg = <0>;
bus-width = <8>;
};
};
&mmc1 {
status = "okay";
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
&spi0 {
cs-gpios = <&pioD 13 0>, <0>, <0>, <0>;
};
&usart0 {
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "okay";
pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
};
&usart1 {
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
};
&usart2 {
pinctrl-0 = <&pinctrl_usart2 &pinctrl_usart2_rts_cts>;
};
&usart3 {
pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
};
&adc0 {
pinctrl-0 = <
&pinctrl_adc0_adtrg
&pinctrl_adc0_ad0
&pinctrl_adc0_ad1
&pinctrl_adc0_ad2
&pinctrl_adc0_ad3
&pinctrl_adc0_ad4
&pinctrl_adc0_ad5
>;
};
&macb0 {
phy-mode = "rgmii";
};
&macb1 {
phy-mode = "rmii";
};
&ebi {
pinctrl-0 = <&pinctrl_ebi_nand_addr>;
pinctrl-names = "default";
status = "okay";
};
&nand_controller {
status = "okay";
nand: nand@3 {
reg = <0x3 0x0 0x2>;
atmel,rb = <0>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
nand-on-flash-bbt;
label = "atmel_nand";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
ubootspl@0 {
label = "u-boot-spl";
reg = <0x0 0x20000>;
};
uboot@20000 {
label = "u-boot";
reg = <0x20000 0x80000>;
};
ubootenv@a0000 {
label = "u-boot-env";
reg = <0xa0000 0x20000>;
};
ubootenv@c0000 {
label = "u-boot-env";
reg = <0xc0000 0x20000>;
};
ubi@e0000 {
label = "ubi";
reg = <0xe0000 0xfe00000>;
};
};
};
};
&usb0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
atmel,vbus-gpio = <&pioC 14 GPIO_ACTIVE_HIGH>;
};
&usb1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_vbus &pinctrl_usb_oc>;
num-ports = <3>;
atmel,vbus-gpio = <0
&pioE 20 GPIO_ACTIVE_HIGH
0>;
atmel,oc-gpio = <0
&pioE 15 GPIO_ACTIVE_LOW
0>;
};

64
arch/arm/boot/dts/at91-wb45n.dts Normal file
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@ -0,0 +1,64 @@
// SPDX-License-Identifier: GPL-2.0
/*
* at91-wb45n.dts - Device Tree file for WB45NBT board
*
* Copyright (C) 2018 Laird
*
*/
/dts-v1/;
#include "at91-wb45n.dtsi"
/ {
model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
irqbtn@18 {
reg = <18>;
label = "IRQBTN";
linux,code = <99>;
gpios = <&pioB 18 GPIO_ACTIVE_LOW>;
gpio-key,wakeup = <1>;
};
};
};
&watchdog {
status = "okay";
};
&usb0 {
status = "okay";
};
&mmc0 {
status = "okay";
};
&spi0 {
status = "okay";
};
&macb0 {
status = "okay";
};
&dbgu {
status = "okay";
};
&usart0 {
status = "okay";
};
&usart3 {
status = "okay";
};
&i2c1 {
status = "okay";
};

165
arch/arm/boot/dts/at91-wb45n.dtsi Normal file
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@ -0,0 +1,165 @@
// SPDX-License-Identifier: GPL-2.0
/*
* at91-wb45n.dtsi - Device Tree file for WB45NBT board
*
* Copyright (C) 2018 Laird
*
*/
#include "at91sam9g25.dtsi"
/ {
model = "Laird Workgroup Bridge 45N - Atmel AT91SAM (dt)";
compatible = "laird,wb45n", "laird,wbxx", "atmel,at91sam9x5", "atmel,at91sam9";
chosen {
bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs rw";
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x20000000 0x4000000>;
};
atheros {
compatible = "atheros,ath6kl";
atheros,board-id = "SD32";
};
};
&reset_controller {
compatible = "atmel,sama5d3-rstc";
};
&shutdown_controller {
atmel,wakeup-mode = "low";
};
&slow_xtal {
clock-frequency = <32768>;
};
&main_xtal {
clock-frequency = <12000000>;
};
&ebi {
status = "okay";
nand_controller: nand-controller {
pinctrl-0 = <&pinctrl_nand_cs &pinctrl_nand_rb &pinctrl_nand_oe_we>;
pinctrl-names = "default";
status = "okay";
nand@3 {
reg = <0x3 0x0 0x800000>;
rb-gpios = <&pioD 5 GPIO_ACTIVE_HIGH>;
cs-gpios = <&pioD 4 GPIO_ACTIVE_HIGH>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-on-flash-bbt;
label = "atmel_nand";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
at91bootstrap@0 {
label = "at91bs";
reg = <0x0 0x20000>;
};
uboot@20000 {
label = "u-boot";
reg = <0x20000 0x80000>;
};
ubootenv@a0000 {
label = "u-boot-env";
reg = <0xa0000 0x20000>;
};
ubootenv@c0000 {
label = "redund-env";
reg = <0xc0000 0x20000>;
};
kernel-a@e0000 {
label = "kernel-a";
reg = <0xe0000 0x280000>;
};
kernel-b@360000 {
label = "kernel-b";
reg = <0x360000 0x280000>;
};
rootfs-a@5e0000 {
label = "rootfs-a";
reg = <0x5e0000 0x2600000>;
};
rootfs-b@2be0000 {
label = "rootfs-b";
reg = <0x2be0000 0x2600000>;
};
user@51e0000 {
label = "user";
reg = <0x51e0000 0x2dc0000>;
};
logs@7fa0000 {
label = "logs";
reg = <0x7fa0000 0x60000>;
};
};
};
};
};
&usb0 {
num-ports = <2>;
atmel,vbus-gpio = <
&pioB 12 GPIO_ACTIVE_HIGH
&pioA 31 GPIO_ACTIVE_HIGH
>;
atmel,oc-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
};
&macb0 {
phy-mode = "rmii";
};
&spi0 {
cs-gpios = <&pioA 14 0>, <&pioA 7 0>, <0>, <0>;
};
&usb2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_board_usb2>;
atmel,vbus-gpio = <&pioB 11 GPIO_ACTIVE_HIGH>;
};
&mmc0 {
pinctrl-0 = <
&pinctrl_mmc0_slot0_clk_cmd_dat0
&pinctrl_mmc0_slot0_dat1_3>;
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
&pinctrl {
usb2 {
pinctrl_board_usb2: usb2-board {
atmel,pins =
<AT91_PIOB 11 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB11 gpio vbus sense, deglitch */
};
};
};

112
arch/arm/boot/dts/at91-wb50n.dts Normal file
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@ -0,0 +1,112 @@
// SPDX-License-Identifier: GPL-2.0
/*
* at91-wb50n.dts - Device Tree file for wb50n evaluation board
*
* Copyright (C) 2018 Laird
*
*/
/dts-v1/;
#include "at91-wb50n.dtsi"
/ {
model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
compatible = "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
btn0@10 {
reg = <10>;
label = "BTNESC";
linux,code = <1>; /* ESC button */
gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
gpio-key,wakeup = <1>;
};
irqbtn@31 {
reg = <31>;
label = "IRQBTN";
linux,code = <99>; /* SysReq button */
gpios = <&pioE 31 GPIO_ACTIVE_LOW>;
gpio-key,wakeup = <1>;
};
};
leds {
compatible = "gpio-leds";
led0 {
label = "wb50n:blue:led0";
gpios = <&pioA 12 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led1 {
label = "wb50n:green:led1";
gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
default-state = "off";
};
led2 {
label = "wb50n:red:led2";
gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
default-state = "off";
};
};
};
&watchdog {
status = "okay";
};
&mmc0 {
status = "okay";
};
&macb1 {
status = "okay";
};
&dbgu {
status = "okay";
};
/* On BB40 this port is labeled UART1 */
&usart0 {
status = "okay";
};
/* On BB40 this port is labeled UART0 */
&usart1 {
status = "okay";
};
&i2c0 {
status = "okay";
};
&spi1 {
status = "okay";
spidev@0 {
compatible = "spidev";
reg = <0>;
spi-max-frequency = <8000000>;
};
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
&usb2 {
status = "okay";
};

198
arch/arm/boot/dts/at91-wb50n.dtsi Normal file
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@ -0,0 +1,198 @@
// SPDX-License-Identifier: GPL-2.0
/*
* at91-wb50n.dtsi - Device Tree include file for wb50n cpu module
*
* Copyright (C) 2018 Laird
*
*/
#include "sama5d31.dtsi"
/ {
model = "Laird Workgroup Bridge 50N - Atmel SAMA5D";
compatible = "laird,wb50n", "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
chosen {
bootargs = "ubi.mtd=6 root=ubi0:rootfs rootfstype=ubifs rw";
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x20000000 0x4000000>;
};
};
&pinctrl {
board {
pinctrl_mmc0_cd: mmc0_cd {
atmel,pins = <AT91_PIOC 26 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; /* PC26 GPIO with pullup deglitch */
};
pinctrl_usba_vbus: usba_vbus {
atmel,pins = <AT91_PIOB 13 AT91_PERIPH_GPIO AT91_PINCTRL_DEGLITCH>; /* PB13 GPIO with deglitch */
};
};
};
&slow_xtal {
clock-frequency = <32768>;
};
&main_xtal {
clock-frequency = <12000000>;
};
&slow_osc {
atmel,osc-bypass;
};
&usart1_clk {
atmel,clk-output-range = <0 132000000>;
};
&mmc0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
cd-gpios = <&pioC 26 GPIO_ACTIVE_LOW>;
slot@0 {
reg = <0>;
bus-width = <4>;
};
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mmc1_clk_cmd_dat0 &pinctrl_mmc1_dat1_3>;
status = "okay";
atheros@0 {
compatible = "atheros,ath6kl";
atheros,board-id = "SD32";
reg = <0>;
bus-width = <4>;
};
};
&macb1 {
phy-mode = "rmii";
};
&dbgu {
dmas = <0>, <0>; /* Do not use DMA for dbgu */
};
/* On BB40 this port is labeled UART1 */
&usart0 {
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart0 &pinctrl_usart0_rts_cts>;
};
/* On BB40 this port is labeled UART0 */
&usart1 {
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart1 &pinctrl_usart1_rts_cts>;
dtr-gpios = <&pioD 13 GPIO_ACTIVE_LOW>;
dsr-gpios = <&pioD 11 GPIO_ACTIVE_LOW>;
dcd-gpios = <&pioD 7 GPIO_ACTIVE_LOW>;
rng-gpios = <&pioD 8 GPIO_ACTIVE_LOW>;
};
/* USART3 is direct-connect to the Bluetooth UART on the radio SIP */
&usart3 {
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usart3 &pinctrl_usart3_rts_cts>;
status = "okay";
};
&spi1 {
cs-gpios = <&pioC 25 0>, <0>, <0>, <0>;
};
&ebi {
pinctrl-0 = <&pinctrl_ebi_nand_addr>;
pinctrl-names = "default";
status = "okay";
};
&nand_controller {
status = "okay";
nand: nand@3 {
reg = <0x3 0x0 0x2>;
atmel,rb = <0>;
nand-bus-width = <8>;
nand-ecc-mode = "hw";
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
nand-on-flash-bbt;
label = "atmel_nand";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
at91bootstrap@0 {
label = "at91bs";
reg = <0x0 0x20000>;
};
uboot@20000 {
label = "u-boot";
reg = <0x20000 0x80000>;
};
ubootenv@a0000 {
label = "u-boot-env";
reg = <0xa0000 0x20000>;
};
ubootenv@c0000 {
label = "u-boot-env";
reg = <0xc0000 0x20000>;
};
kernel-a@e0000 {
label = "kernel-a";
reg = <0xe0000 0x500000>;
};
kernel-b@5e0000 {
label = "kernel-b";
reg = <0x5e0000 0x500000>;
};
rootfs-a@ae0000 {
label = "rootfs-a";
reg = <0xae0000 0x3000000>;
};
rootfs-b@3ae0000 {
label = "rootfs-b";
reg = <0x3ae0000 0x3000000>;
};
user@6ae0000 {
label = "user";
reg = <0x6ae0000 0x14e0000>;
};
};
};
};
&usb0 {
atmel,vbus-gpio = <&pioB 13 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
};
&usb1 {
num-ports = <3>;
atmel,vbus-gpio = <&pioA 2 GPIO_ACTIVE_LOW>;
atmel,oc-gpio = <&pioA 4 GPIO_ACTIVE_LOW>;
};

2
arch/arm/boot/dts/at91sam9261.dtsi
View File

@ -590,7 +590,7 @@ pioC: gpio@fffff800 {
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-pmc", "syscon";
compatible = "atmel,at91sam9261-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-controller;

2
arch/arm/boot/dts/at91sam9263.dtsi
View File

@ -93,7 +93,7 @@ aic: interrupt-controller@fffff000 {
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91rm9200-pmc", "syscon";
compatible = "atmel,at91sam9263-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-controller;

2
arch/arm/boot/dts/at91sam9rl.dtsi
View File

@ -832,7 +832,7 @@ pioD: gpio@fffffa00 {
};
pmc: pmc@fffffc00 {
compatible = "atmel,at91sam9g45-pmc", "syscon";
compatible = "atmel,at91sam9rl-pmc", "syscon";
reg = <0xfffffc00 0x100>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-controller;

8
arch/arm/boot/dts/at91sam9x5.dtsi
View File

@ -389,13 +389,13 @@ ssc0_clk: ssc0_clk {
};
};
rstc@fffffe00 {
reset_controller: rstc@fffffe00 {
compatible = "atmel,at91sam9g45-rstc";
reg = <0xfffffe00 0x10>;
clocks = <&clk32k>;
};
shdwc@fffffe10 {
shutdown_controller: shdwc@fffffe10 {
compatible = "atmel,at91sam9x5-shdwc";
reg = <0xfffffe10 0x10>;
clocks = <&clk32k>;
@ -470,7 +470,7 @@ dma1: dma-controller@ffffee00 {
clock-names = "dma_clk";
};
pinctrl@fffff400 {
pinctrl: pinctrl@fffff400 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,at91sam9x5-pinctrl", "atmel,at91rm9200-pinctrl", "simple-bus";
@ -1206,7 +1206,7 @@ ep@6 {
};
};
watchdog@fffffe40 {
watchdog: watchdog@fffffe40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfffffe40 0x10>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;

4
arch/arm/boot/dts/sama5d2-pinfunc.h
View File

@ -375,7 +375,7 @@
#define PIN_PB22__GPIO PINMUX_PIN(PIN_PB22, 0, 0)
#define PIN_PB22__LCDDAT11 PINMUX_PIN(PIN_PB22, 1, 1)
#define PIN_PB22__A11 PINMUX_PIN(PIN_PB22, 2, 1)
#define PIN_PB22__TDO PINMUX_PIN(PIN_PB22, 3, 1)
#define PIN_PB22__TD0 PINMUX_PIN(PIN_PB22, 3, 1)
#define PIN_PB22__TIOA2 PINMUX_PIN(PIN_PB22, 4, 2)
#define PIN_PB22__FLEXCOM3_IO1 PINMUX_PIN(PIN_PB22, 5, 3)
#define PIN_PB22__GMDC PINMUX_PIN(PIN_PB22, 6, 3)
@ -556,7 +556,7 @@
#define PIN_PC14__LCDDAT6 PINMUX_PIN(PIN_PC14, 1, 2)
#define PIN_PC14__GRX0 PINMUX_PIN(PIN_PC14, 2, 1)
#define PIN_PC14__ISC_D5 PINMUX_PIN(PIN_PC14, 3, 1)
#define PIN_PC14__TDO PINMUX_PIN(PIN_PC14, 5, 2)
#define PIN_PC14__TD0 PINMUX_PIN(PIN_PC14, 5, 2)
#define PIN_PC14__A3 PINMUX_PIN(PIN_PC14, 6, 2)
#define PIN_PC15 79
#define PIN_PC15__GPIO PINMUX_PIN(PIN_PC15, 0, 0)

8
arch/arm/boot/dts/sama5d3.dtsi
View File

@ -494,7 +494,7 @@ aic: interrupt-controller@fffff000 {
atmel,external-irqs = <47>;
};
pinctrl@fffff200 {
pinctrl: pinctrl@fffff200 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,sama5d3-pinctrl", "atmel,at91sam9x5-pinctrl", "simple-bus";
@ -1340,13 +1340,13 @@ mpddr_clk: mpddr_clk {
};
};
rstc@fffffe00 {
reset_controller: rstc@fffffe00 {
compatible = "atmel,sama5d3-rstc", "atmel,at91sam9g45-rstc";
reg = <0xfffffe00 0x10>;
clocks = <&clk32k>;
};
shutdown-controller@fffffe10 {
shutdown_controller: shutdown-controller@fffffe10 {
compatible = "atmel,at91sam9x5-shdwc";
reg = <0xfffffe10 0x10>;
clocks = <&clk32k>;
@ -1359,7 +1359,7 @@ pit: timer@fffffe30 {
clocks = <&mck>;
};
watchdog@fffffe40 {
watchdog: watchdog@fffffe40 {
compatible = "atmel,at91sam9260-wdt";
reg = <0xfffffe40 0x10>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;

2
arch/arm/boot/dts/sama5d4.dtsi
View File

@ -392,7 +392,7 @@ dma0: dma-controller@f0014000 {
};
pmc: pmc@f0018000 {
compatible = "atmel,sama5d3-pmc", "syscon";
compatible = "atmel,sama5d4-pmc", "syscon";
reg = <0xf0018000 0x120>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
interrupt-controller;

5
arch/arm/mach-at91/pm.c
View File

@ -559,15 +559,20 @@ static const struct pmc_info pmc_infos[] __initconst = {
{ .uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP },
{ .uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP },
{ .uhp_udp_mask = AT91SAM926x_PMC_UHP },
{ .uhp_udp_mask = 0 },
};
static const struct of_device_id atmel_pmc_ids[] __initconst = {
{ .compatible = "atmel,at91rm9200-pmc", .data = &pmc_infos[0] },
{ .compatible = "atmel,at91sam9260-pmc", .data = &pmc_infos[1] },
{ .compatible = "atmel,at91sam9261-pmc", .data = &pmc_infos[1] },
{ .compatible = "atmel,at91sam9263-pmc", .data = &pmc_infos[1] },
{ .compatible = "atmel,at91sam9g45-pmc", .data = &pmc_infos[2] },
{ .compatible = "atmel,at91sam9n12-pmc", .data = &pmc_infos[1] },
{ .compatible = "atmel,at91sam9rl-pmc", .data = &pmc_infos[3] },
{ .compatible = "atmel,at91sam9x5-pmc", .data = &pmc_infos[1] },
{ .compatible = "atmel,sama5d3-pmc", .data = &pmc_infos[1] },
{ .compatible = "atmel,sama5d4-pmc", .data = &pmc_infos[1] },
{ .compatible = "atmel,sama5d2-pmc", .data = &pmc_infos[1] },
{ /* sentinel */ },
};