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arm64: dts: r8a7795: Remove unit-addresses and regs from integrated caches 

The Cortex-A57/A53 cache controllers are integrated controllers, and
thus the device nodes representing them should not have unit-addresses
or reg properties.

Fixes: 6f7bf82cc9 ("arm64: dts: r8a7795: Fix W=1 dtc warnings")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Geert Uytterhoeven 2017-03-03 14:18:16 +01:00 committed by Simon Horman
parent b3f26910c0
commit d165856de1
1 changed files with 2 additions and 4 deletions
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arch/arm64/boot/dts/renesas/r8a7795.dtsi
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@ -109,17 +109,15 @@ a53_3: cpu@103 {
enable-method = "psci";
};
L2_CA57: cache-controller@0 {
L2_CA57: cache-controller-0 {
compatible = "cache";
reg = <0>;
power-domains = <&sysc R8A7795_PD_CA57_SCU>;
cache-unified;
cache-level = <2>;
};
L2_CA53: cache-controller@100 {
L2_CA53: cache-controller-1 {
compatible = "cache";
reg = <0x100>;
power-domains = <&sysc R8A7795_PD_CA53_SCU>;
cache-unified;
cache-level = <2>;