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dmaengine: qcom_hidma: add a common API to setup the interrupt 

Introducing the hidma_ll_setup_irq function to set up the interrupt
type externally from the OS interface.

Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
Sinan Kaya 2016-10-07 01:25:12 -04:00 committed by Vinod Koul
parent 9da0be80be
commit d3eab504d4
2 changed files with 25 additions and 4 deletions
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2
drivers/dma/qcom/hidma.h
View File

@ -46,6 +46,7 @@ struct hidma_tre {
}; };
struct hidma_lldev { struct hidma_lldev {
bool msi_support; /* flag indicating MSI support */
bool initialized; /* initialized flag */ bool initialized; /* initialized flag */
u8 trch_state; /* trch_state of the device */ u8 trch_state; /* trch_state of the device */
u8 evch_state; /* evch_state of the device */ u8 evch_state; /* evch_state of the device */
@ -145,6 +146,7 @@ int hidma_ll_disable(struct hidma_lldev *lldev);
int hidma_ll_enable(struct hidma_lldev *llhndl); int hidma_ll_enable(struct hidma_lldev *llhndl);
void hidma_ll_set_transfer_params(struct hidma_lldev *llhndl, u32 tre_ch, void hidma_ll_set_transfer_params(struct hidma_lldev *llhndl, u32 tre_ch,
dma_addr_t src, dma_addr_t dest, u32 len, u32 flags); dma_addr_t src, dma_addr_t dest, u32 len, u32 flags);
void hidma_ll_setup_irq(struct hidma_lldev *lldev, bool msi);
int hidma_ll_setup(struct hidma_lldev *lldev); int hidma_ll_setup(struct hidma_lldev *lldev);
struct hidma_lldev *hidma_ll_init(struct device *dev, u32 max_channels, struct hidma_lldev *hidma_ll_init(struct device *dev, u32 max_channels,
void __iomem *trca, void __iomem *evca, void __iomem *trca, void __iomem *evca,

27
drivers/dma/qcom/hidma_ll.c
View File

@ -680,17 +680,36 @@ int hidma_ll_setup(struct hidma_lldev *lldev)
writel(HIDMA_EVRE_SIZE * nr_tres, writel(HIDMA_EVRE_SIZE * nr_tres,
lldev->evca + HIDMA_EVCA_RING_LEN_REG); lldev->evca + HIDMA_EVCA_RING_LEN_REG);
/* support IRQ only for now */ /* configure interrupts */
hidma_ll_setup_irq(lldev, lldev->msi_support);
rc = hidma_ll_enable(lldev);
if (rc)
return rc;
return rc;
}
void hidma_ll_setup_irq(struct hidma_lldev *lldev, bool msi)
{
u32 val;
lldev->msi_support = msi;
/* disable interrupts again after reset */
writel(0, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG);
writel(0, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
/* support IRQ by default */
val = readl(lldev->evca + HIDMA_EVCA_INTCTRL_REG); val = readl(lldev->evca + HIDMA_EVCA_INTCTRL_REG);
val &= ~0xF; val &= ~0xF;
val |= 0x1; if (!lldev->msi_support)
val = val | 0x1;
writel(val, lldev->evca + HIDMA_EVCA_INTCTRL_REG); writel(val, lldev->evca + HIDMA_EVCA_INTCTRL_REG);
/* clear all pending interrupts and enable them */ /* clear all pending interrupts and enable them */
writel(ENABLE_IRQS, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG); writel(ENABLE_IRQS, lldev->evca + HIDMA_EVCA_IRQ_CLR_REG);
writel(ENABLE_IRQS, lldev->evca + HIDMA_EVCA_IRQ_EN_REG); writel(ENABLE_IRQS, lldev->evca + HIDMA_EVCA_IRQ_EN_REG);
return hidma_ll_enable(lldev);
} }
struct hidma_lldev *hidma_ll_init(struct device *dev, u32 nr_tres, struct hidma_lldev *hidma_ll_init(struct device *dev, u32 nr_tres,