i40e/i40evf: Use length to determine if descriptor is done
This change makes it so that we use the length of the packet instead of the DD status bit to determine if a new descriptor is ready to be processed. The obvious advantage is that it cuts down on reads as we don't really even need the DD bit if going from a 0 to a non-zero value on size is enough to inform us that the packet has been completed. Change-ID: Iebdf9cdb36c454ef092df27199b92ad09c374231 Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -1757,6 +1757,7 @@ static bool i40e_add_rx_frag(struct i40e_ring *rx_ring,
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* i40e_fetch_rx_buffer - Allocate skb and populate it
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* @rx_ring: rx descriptor ring to transact packets on
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* @rx_desc: descriptor containing info written by hardware
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* @size: size of buffer to add to skb
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*
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* This function allocates an skb on the fly, and populates it with the page
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* data from the current receive descriptor, taking care to set up the skb
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@ -1766,13 +1767,9 @@ static bool i40e_add_rx_frag(struct i40e_ring *rx_ring,
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static inline
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struct sk_buff *i40e_fetch_rx_buffer(struct i40e_ring *rx_ring,
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union i40e_rx_desc *rx_desc,
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struct sk_buff *skb)
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struct sk_buff *skb,
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unsigned int size)
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{
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u64 local_status_error_len =
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le64_to_cpu(rx_desc->wb.qword1.status_error_len);
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unsigned int size =
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(local_status_error_len & I40E_RXD_QW1_LENGTH_PBUF_MASK) >>
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I40E_RXD_QW1_LENGTH_PBUF_SHIFT;
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struct i40e_rx_buffer *rx_buffer;
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struct page *page;
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@ -1890,6 +1887,7 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget)
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while (likely(total_rx_packets < budget)) {
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union i40e_rx_desc *rx_desc;
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unsigned int size;
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u16 vlan_tag;
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u8 rx_ptype;
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u64 qword;
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@ -1906,19 +1904,21 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget)
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/* status_error_len will always be zero for unused descriptors
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* because it's cleared in cleanup, and overlaps with hdr_addr
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* which is always zero because packet split isn't used, if the
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* hardware wrote DD then it will be non-zero
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* hardware wrote DD then the length will be non-zero
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*/
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if (!i40e_test_staterr(rx_desc,
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BIT(I40E_RX_DESC_STATUS_DD_SHIFT)))
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qword = le64_to_cpu(rx_desc->wb.qword1.status_error_len);
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size = (qword & I40E_RXD_QW1_LENGTH_PBUF_MASK) >>
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I40E_RXD_QW1_LENGTH_PBUF_SHIFT;
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if (!size)
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break;
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/* This memory barrier is needed to keep us from reading
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* any other fields out of the rx_desc until we know the
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* DD bit is set.
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* any other fields out of the rx_desc until we have
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* verified the descriptor has been written back.
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*/
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dma_rmb();
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skb = i40e_fetch_rx_buffer(rx_ring, rx_desc, skb);
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skb = i40e_fetch_rx_buffer(rx_ring, rx_desc, skb, size);
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if (!skb)
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break;
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@ -1116,6 +1116,7 @@ static bool i40e_add_rx_frag(struct i40e_ring *rx_ring,
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* i40evf_fetch_rx_buffer - Allocate skb and populate it
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* @rx_ring: rx descriptor ring to transact packets on
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* @rx_desc: descriptor containing info written by hardware
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* @size: size of buffer to add to skb
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*
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* This function allocates an skb on the fly, and populates it with the page
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* data from the current receive descriptor, taking care to set up the skb
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@ -1125,13 +1126,9 @@ static bool i40e_add_rx_frag(struct i40e_ring *rx_ring,
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static inline
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struct sk_buff *i40evf_fetch_rx_buffer(struct i40e_ring *rx_ring,
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union i40e_rx_desc *rx_desc,
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struct sk_buff *skb)
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struct sk_buff *skb,
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unsigned int size)
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{
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u64 local_status_error_len =
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le64_to_cpu(rx_desc->wb.qword1.status_error_len);
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unsigned int size =
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(local_status_error_len & I40E_RXD_QW1_LENGTH_PBUF_MASK) >>
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I40E_RXD_QW1_LENGTH_PBUF_SHIFT;
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struct i40e_rx_buffer *rx_buffer;
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struct page *page;
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@ -1244,6 +1241,7 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget)
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while (likely(total_rx_packets < budget)) {
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union i40e_rx_desc *rx_desc;
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unsigned int size;
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u16 vlan_tag;
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u8 rx_ptype;
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u64 qword;
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@ -1260,19 +1258,21 @@ static int i40e_clean_rx_irq(struct i40e_ring *rx_ring, int budget)
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/* status_error_len will always be zero for unused descriptors
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* because it's cleared in cleanup, and overlaps with hdr_addr
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* which is always zero because packet split isn't used, if the
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* hardware wrote DD then it will be non-zero
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* hardware wrote DD then the length will be non-zero
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*/
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if (!i40e_test_staterr(rx_desc,
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BIT(I40E_RX_DESC_STATUS_DD_SHIFT)))
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qword = le64_to_cpu(rx_desc->wb.qword1.status_error_len);
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size = (qword & I40E_RXD_QW1_LENGTH_PBUF_MASK) >>
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I40E_RXD_QW1_LENGTH_PBUF_SHIFT;
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if (!size)
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break;
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/* This memory barrier is needed to keep us from reading
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* any other fields out of the rx_desc until we know the
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* DD bit is set.
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* any other fields out of the rx_desc until we have
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* verified the descriptor has been written back.
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*/
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dma_rmb();
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skb = i40evf_fetch_rx_buffer(rx_ring, rx_desc, skb);
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skb = i40evf_fetch_rx_buffer(rx_ring, rx_desc, skb, size);
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if (!skb)
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break;
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