xtensa: make dma_cache_sync a no-op
xtensa does not implement DMA_ATTR_NON_CONSISTENT allocations, so it doesn't make any sense to do any work in dma_cache_sync given that it must be a no-op when dma_alloc_attrs returns coherent memory. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Robin Murphy <robin.murphy@arm.com>
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@ -23,8 +23,10 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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return &xtensa_dma_map_ops;
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}
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void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction);
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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}
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static inline dma_addr_t phys_to_dma(struct device *dev, phys_addr_t paddr)
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{
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@ -26,29 +26,6 @@
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#include <asm/cacheflush.h>
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#include <asm/io.h>
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void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction dir)
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{
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switch (dir) {
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case DMA_BIDIRECTIONAL:
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__flush_invalidate_dcache_range((unsigned long)vaddr, size);
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break;
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case DMA_FROM_DEVICE:
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__invalidate_dcache_range((unsigned long)vaddr, size);
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break;
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case DMA_TO_DEVICE:
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__flush_dcache_range((unsigned long)vaddr, size);
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break;
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case DMA_NONE:
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BUG();
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break;
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}
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}
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EXPORT_SYMBOL(dma_cache_sync);
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static void do_cache_op(dma_addr_t dma_handle, size_t size,
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void (*fn)(unsigned long, unsigned long))
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{
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