Samsung DeviceTree updates and improvements for 4.5

1. eMMC/SDIO minor fixes usage of bindings on Snow and Peach
    Chromebooks.
 2. Remove FIMD from Odroid XU3-family because on XU3 it cannot be used
    yet and on XU3-Lite and XU4 it is not supported.
 3. Remove deprecated since June 2013 samsung,exynos5-hdmi.
 4. Add support for Pseudo Random Generator on Exynos4 (Trats2 for now).
    This depends on new SSS clock.
 5. Add rotator nodes for Exynos4 and Exynos5.
 6. Switch DWC3_1 on Odroid XU3 and XU3-Lite to peripheral mode because
    now it cannot be used as OTG.
 7. Cleanup the G2D usage on Exynos4 and add it to a proper domain
    in case of Exynos4210.
 8. Put MDMA1 in proper domain on Exynos4210 as well.
 9. Minor cleanups.
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Merge tag 'samsung-dt-4.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/dt

Merge "Samsung DeviceTree updates and improvements for 4.5" from Krzysztof Kozlowski:

1. eMMC/SDIO minor fixes usage of bindings on Snow and Peach
   Chromebooks.
2. Remove FIMD from Odroid XU3-family because on XU3 it cannot be used
   yet and on XU3-Lite and XU4 it is not supported.
3. Remove deprecated since June 2013 samsung,exynos5-hdmi.
4. Add support for Pseudo Random Generator on Exynos4 (Trats2 for now).
   This depends on new SSS clock.
5. Add rotator nodes for Exynos4 and Exynos5.
6. Switch DWC3_1 on Odroid XU3 and XU3-Lite to peripheral mode because
   now it cannot be used as OTG.
7. Cleanup the G2D usage on Exynos4 and add it to a proper domain
   in case of Exynos4210.
8. Put MDMA1 in proper domain on Exynos4210 as well.
9. Minor cleanups.

* tag 'samsung-dt-4.5-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (21 commits)
  ARM: dts: Unify G2D device node with other devices on exynos4
  ARM: dts: Add power domain to G2D device on exynos4210
  ARM: dts: MDMA1 device belongs to LCD0 power domain on exynos4210
  ARM: dts: Remove unneeded GPIO include in exynos4412-odroidu3
  ARM: dts: exynos4210-universal_c210: Disable DMA for UARTs
  ARM: dts: Use peripheral mode for dwc3_1 on exynos5422-odroidxu3
  ARM: dts: Add rotator node on exynos5420
  ARM: dts: Add rotator node on exynos5250
  ARM: dts: Fix power domain for sysmmu-rotator device on exynos4
  ARM: dts: Add rotator nodes on exynos4
  ARM: dts: Enable PRNG module on exynos4412-trats2
  ARM: dts: Add PRNG module for exynos4
  dt-bindings: remove deprecated compatible string from exynos-hdmi
  ARM: dts: Remove fimd node from exynos5422-odroidxu3-common
  ARM: dts: Mark eMMC as non-removable in exynos5250-snow-common
  ARM: dts: Remove broken-cd from eMMC node in exynos5420-peach-pi
  ARM: dts: Remove broken-cd from eMMC node in exynos5800-peach-pi
  ARM: dts: Mark SDIO as non-removable in exynos5250-snow-common
  ARM: dts: Mark SDIO as non-removable in exynos5420-peach-pit
  ARM: dts: Mark SDIO as non-removable in exynos5800-peach-pi
  ...
This commit is contained in:
Arnd Bergmann 2015-12-31 17:31:56 +01:00
commit d731afa460
22 changed files with 85 additions and 47 deletions

View File

@ -2,10 +2,9 @@ Device-Tree bindings for drm hdmi driver
Required properties:
- compatible: value should be one among the following:
1) "samsung,exynos5-hdmi" <DEPRECATED>
2) "samsung,exynos4210-hdmi"
3) "samsung,exynos4212-hdmi"
4) "samsung,exynos5420-hdmi"
1) "samsung,exynos4210-hdmi"
2) "samsung,exynos4212-hdmi"
3) "samsung,exynos5420-hdmi"
- reg: physical base address of the hdmi and length of memory mapped
region.
- interrupts: interrupt number to the cpu.

View File

@ -727,6 +727,15 @@ jpeg_codec: jpeg-codec@11840000 {
iommus = <&sysmmu_jpeg>;
};
rotator: rotator@12810000 {
compatible = "samsung,exynos4210-rotator";
reg = <0x12810000 0x64>;
interrupts = <0 83 0>;
clocks = <&clock CLK_ROTATOR>;
clock-names = "rotator";
iommus = <&sysmmu_rotator>;
};
hdmi: hdmi@12D00000 {
compatible = "samsung,exynos4210-hdmi";
reg = <0x12D00000 0x70000>;
@ -954,7 +963,6 @@ sysmmu_rotator: sysmmu@12A30000 {
interrupts = <5 0>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>;
power-domains = <&pd_lcd0>;
#iommu-cells = <0>;
};
@ -968,4 +976,12 @@ sysmmu_fimd0: sysmmu@11E20000 {
power-domains = <&pd_lcd0>;
#iommu-cells = <0>;
};
prng: rng@10830400 {
compatible = "samsung,exynos4-rng";
reg = <0x10830400 0x200>;
clocks = <&clock CLK_SSS>;
clock-names = "secss";
status = "disabled";
};
};

View File

@ -138,10 +138,6 @@ &fimd {
status = "okay";
};
&g2d {
status = "okay";
};
&i2c_0 {
status = "okay";
samsung,i2c-sda-delay = <100>;

View File

@ -44,10 +44,6 @@ xusbxti {
};
};
&g2d {
status = "okay";
};
&i2c_0 {
#address-cells = <1>;
#size-cells = <0>;

View File

@ -560,16 +560,24 @@ &sdhci_2 {
&serial_0 {
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
};
&serial_1 {
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
};
&serial_2 {
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
};
&serial_3 {
status = "okay";
/delete-property/dmas;
/delete-property/dma-names;
};

View File

@ -185,8 +185,8 @@ g2d: g2d@12800000 {
interrupts = <0 89 0>;
clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
clock-names = "sclk_fimg2d", "fimg2d";
power-domains = <&pd_lcd0>;
iommus = <&sysmmu_g2d>;
status = "disabled";
};
camera {
@ -271,6 +271,10 @@ &combiner {
<0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>;
};
&mdma1 {
power-domains = <&pd_lcd0>;
};
&pmu_system_controller {
clock-names = "clkout0", "clkout1", "clkout2", "clkout3",
"clkout4", "clkout8", "clkout9";
@ -279,3 +283,11 @@ &pmu_system_controller {
<&clock CLK_OUT_CPU>, <&clock CLK_XXTI>, <&clock CLK_XUSBXTI>;
#clock-cells = <1>;
};
&rotator {
power-domains = <&pd_lcd0>;
};
&sysmmu_rotator {
power-domains = <&pd_lcd0>;
};

View File

@ -177,10 +177,6 @@ &fimc_3 {
assigned-clock-rates = <0>, <176000000>;
};
&g2d {
status = "okay";
};
&hdmi {
hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";

View File

@ -13,7 +13,6 @@
/dts-v1/;
#include "exynos4412-odroid-common.dtsi"
#include <dt-bindings/gpio/gpio.h>
/ {
model = "Hardkernel ODROID-U3 board based on Exynos4412";

View File

@ -89,10 +89,6 @@ &fimd {
status = "okay";
};
&g2d {
status = "okay";
};
&i2c_0 {
#address-cells = <1>;
#size-cells = <0>;

View File

@ -41,10 +41,6 @@ xusbxti {
};
};
&g2d {
status = "okay";
};
&keypad {
samsung,keypad-num-rows = <3>;
samsung,keypad-num-columns = <8>;

View File

@ -1234,6 +1234,10 @@ &pwm {
status = "okay";
};
&prng {
status = "okay";
};
&rtc {
status = "okay";
clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;

View File

@ -116,7 +116,6 @@ g2d: g2d@10800000 {
clocks = <&clock CLK_SCLK_FIMG2D>, <&clock CLK_G2D>;
clock-names = "sclk_fimg2d", "fimg2d";
iommus = <&sysmmu_g2d>;
status = "disabled";
};
camera {
@ -339,6 +338,10 @@ &jpeg_codec {
compatible = "samsung,exynos4212-jpeg";
};
&rotator {
compatible = "samsung,exynos4212-rotator";
};
&mixer {
compatible = "samsung,exynos4212-mixer";
clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";

View File

@ -520,8 +520,7 @@ &i2s0 {
&mmc_0 {
status = "okay";
num-slots = <1>;
broken-cd;
card-detect-delay = <200>;
non-removable;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;
@ -552,10 +551,9 @@ &mmc_2 {
&mmc_3 {
status = "okay";
num-slots = <1>;
broken-cd;
non-removable;
cap-sdio-irq;
keep-power-in-suspend;
card-detect-delay = <200>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <2 3>;
samsung,dw-mshc-ddr-timing = <1 2>;

View File

@ -269,6 +269,15 @@ mfc: codec@11000000 {
iommu-names = "left", "right";
};
rotator: rotator@11C00000 {
compatible = "samsung,exynos5250-rotator";
reg = <0x11C00000 0x64>;
interrupts = <0 84 0>;
clocks = <&clock CLK_ROTATOR>;
clock-names = "rotator";
iommus = <&sysmmu_rotator>;
};
tmu: tmu@10060000 {
compatible = "samsung,exynos5250-tmu";
reg = <0x10060000 0x100>;

View File

@ -690,11 +690,9 @@ &i2s0 {
&mmc_0 {
status = "okay";
num-slots = <1>;
broken-cd;
mmc-hs200-1_8v;
cap-mmc-highspeed;
non-removable;
card-detect-delay = <200>;
clock-frequency = <400000000>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <0 4>;
@ -709,10 +707,9 @@ &mmc_0 {
&mmc_1 {
status = "okay";
num-slots = <1>;
broken-cd;
non-removable;
cap-sdio-irq;
keep-power-in-suspend;
card-detect-delay = <200>;
clock-frequency = <400000000>;
samsung,dw-mshc-ciu-div = <1>;
samsung,dw-mshc-sdr-timing = <0 1>;

View File

@ -717,6 +717,15 @@ mixer: mixer@14450000 {
iommus = <&sysmmu_tv>;
};
rotator: rotator@11C00000 {
compatible = "samsung,exynos5250-rotator";
reg = <0x11C00000 0x64>;
interrupts = <0 84 0>;
clocks = <&clock CLK_ROTATOR>;
clock-names = "rotator";
iommus = <&sysmmu_rotator>;
};
gsc_0: video-scaler@13e00000 {
compatible = "samsung,exynos5-gsc";
reg = <0x13e00000 0x1000>;
@ -1059,6 +1068,16 @@ sysmmu_scaler2w: sysmmu@0x128E0000 {
#iommu-cells = <0>;
};
sysmmu_rotator: sysmmu@0x11D40000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11D40000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 0>;
clock-names = "sysmmu", "master";
clocks = <&clock CLK_SMMU_ROTATOR>, <&clock CLK_ROTATOR>;
#iommu-cells = <0>;
};
sysmmu_jpeg0: sysmmu@0x11F10000 {
compatible = "samsung,exynos-sysmmu";
reg = <0x11F10000 0x1000>;

View File

@ -67,11 +67,6 @@ &clock_audss {
<19200000>;
};
&fimd {
status = "okay";
};
&hdmi {
status = "okay";
hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;

View File

@ -67,5 +67,5 @@ &pwm {
};
&usbdrd_dwc3_1 {
dr_mode = "otg";
dr_mode = "peripheral";
};

View File

@ -98,5 +98,5 @@ &pwm {
};
&usbdrd_dwc3_1 {
dr_mode = "otg";
dr_mode = "peripheral";
};

View File

@ -652,12 +652,10 @@ &i2s0 {
&mmc_0 {
status = "okay";
num-slots = <1>;
broken-cd;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
cap-mmc-highspeed;
non-removable;
card-detect-delay = <200>;
clock-frequency = <800000000>;
samsung,dw-mshc-ciu-div = <3>;
samsung,dw-mshc-sdr-timing = <0 4>;
@ -672,10 +670,9 @@ &mmc_0 {
&mmc_1 {
status = "okay";
num-slots = <1>;
broken-cd;
non-removable;
cap-sdio-irq;
keep-power-in-suspend;
card-detect-delay = <200>;
clock-frequency = <400000000>;
samsung,dw-mshc-ciu-div = <1>;
samsung,dw-mshc-sdr-timing = <0 1>;

View File

@ -1024,6 +1024,7 @@ static struct samsung_gate_clock exynos4_gate_clks[] __initdata = {
0, 0),
GATE(CLK_AC97, "ac97", "aclk100", GATE_IP_PERIL, 27,
0, 0),
GATE(CLK_SSS, "sss", "aclk133", GATE_IP_DMC, 4, 0, 0),
GATE(CLK_PPMUDMC0, "ppmudmc0", "aclk133", GATE_IP_DMC, 8, 0, 0),
GATE(CLK_PPMUDMC1, "ppmudmc1", "aclk133", GATE_IP_DMC, 9, 0, 0),
GATE(CLK_PPMUCPU, "ppmucpu", "aclk133", GATE_IP_DMC, 10, 0, 0),

View File

@ -93,6 +93,7 @@
#define CLK_SCLK_FIMG2D 177
/* gate clocks */
#define CLK_SSS 255
#define CLK_FIMC0 256
#define CLK_FIMC1 257
#define CLK_FIMC2 258