drm/i915/sdvo: Implement proper HDMI audio support for SDVO
Our SDVO audio support is pretty bogus. We can't push audio over the SDVO bus, so trying to enable audio in the SDVO control register doesn't do anything. In fact it looks like the SDVO encoder will always mix in the audio coming over HDA, and there's no (at least documented) way to disable that from our side. So HDMI audio does work currently on gen4 but only by luck really. On gen3 it got broken by the referenced commit. And what has always been missing on every platform is the ELD. To pass the ELD to the audio driver we need to write it to magic buffer in the SDVO encoder hardware which then gets pulled out via HDA in the other end. Ie. pretty much the same thing we had for native HDMI before we started to just pass the ELD between the drivers. This sort of explains why we even have that silly hardware buffer with native HDMI. $ cat /proc/asound/card0/eld#1.0 -monitor_present 0 -eld_valid 0 +monitor_present 1 +eld_valid 1 +monitor_name LG TV +connection_type HDMI +... This also fixes our state readout since we can now query the SDVO encoder about the state of the "ELD valid" and "presence detect" bits. As mentioned those don't actually control whether audio gets sent over the HDMI cable, but it's the best we can do. And with the state checker appeased we can re-enable HDMI audio for gen3. Cc: stable@vger.kernel.org Cc: Daniel Vetter <daniel.vetter@ffwll.ch> Cc: zardam@gmail.com Tested-by: zardam@gmail.com Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108976 Fixes:de44e256b9
("drm/i915/sdvo: Shut up state checker with hdmi cards on gen3") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190409144054.24561-3-ville.syrjala@linux.intel.com Reviewed-by: Imre Deak <imre.deak@intel.com> (cherry picked from commitdc49a56bd4
) Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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@ -916,6 +916,13 @@ static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
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return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
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}
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static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
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u8 audio_state)
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{
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return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT,
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&audio_state, 1);
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}
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#if 0
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static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
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{
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@ -1487,11 +1494,6 @@ static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
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else
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sdvox |= SDVO_PIPE_SEL(crtc->pipe);
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if (crtc_state->has_audio) {
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WARN_ON_ONCE(INTEL_GEN(dev_priv) < 4);
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sdvox |= SDVO_AUDIO_ENABLE;
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}
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if (INTEL_GEN(dev_priv) >= 4) {
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/* done in crtc_mode_set as the dpll_md reg must be written early */
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} else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
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@ -1635,8 +1637,13 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
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if (sdvox & HDMI_COLOR_RANGE_16_235)
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pipe_config->limited_color_range = true;
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if (sdvox & SDVO_AUDIO_ENABLE)
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pipe_config->has_audio = true;
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if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT,
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&val, 1)) {
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u8 mask = SDVO_AUDIO_ELD_VALID | SDVO_AUDIO_PRESENCE_DETECT;
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if ((val & mask) == mask)
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pipe_config->has_audio = true;
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}
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if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
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&val, 1)) {
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@ -1647,6 +1654,32 @@ static void intel_sdvo_get_config(struct intel_encoder *encoder,
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intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config);
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}
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static void intel_sdvo_disable_audio(struct intel_sdvo *intel_sdvo)
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{
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intel_sdvo_set_audio_state(intel_sdvo, 0);
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}
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static void intel_sdvo_enable_audio(struct intel_sdvo *intel_sdvo,
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const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state)
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{
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const struct drm_display_mode *adjusted_mode =
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&crtc_state->base.adjusted_mode;
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struct drm_connector *connector = conn_state->connector;
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u8 *eld = connector->eld;
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eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2;
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intel_sdvo_set_audio_state(intel_sdvo, 0);
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intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
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SDVO_HBUF_TX_DISABLED,
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eld, drm_eld_size(eld));
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intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID |
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SDVO_AUDIO_PRESENCE_DETECT);
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}
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static void intel_disable_sdvo(struct intel_encoder *encoder,
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const struct intel_crtc_state *old_crtc_state,
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const struct drm_connector_state *conn_state)
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@ -1656,6 +1689,9 @@ static void intel_disable_sdvo(struct intel_encoder *encoder,
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struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->base.crtc);
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u32 temp;
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if (old_crtc_state->has_audio)
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intel_sdvo_disable_audio(intel_sdvo);
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intel_sdvo_set_active_outputs(intel_sdvo, 0);
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if (0)
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intel_sdvo_set_encoder_power_state(intel_sdvo,
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@ -1741,6 +1777,9 @@ static void intel_enable_sdvo(struct intel_encoder *encoder,
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intel_sdvo_set_encoder_power_state(intel_sdvo,
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DRM_MODE_DPMS_ON);
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intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
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if (pipe_config->has_audio)
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intel_sdvo_enable_audio(intel_sdvo, pipe_config, conn_state);
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}
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static enum drm_mode_status
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@ -2603,7 +2642,6 @@ static bool
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intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
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{
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struct drm_encoder *encoder = &intel_sdvo->base.base;
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struct drm_i915_private *dev_priv = to_i915(encoder->dev);
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struct drm_connector *connector;
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struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
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struct intel_connector *intel_connector;
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@ -2640,9 +2678,7 @@ intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
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encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
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connector->connector_type = DRM_MODE_CONNECTOR_DVID;
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/* gen3 doesn't do the hdmi bits in the SDVO register */
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if (INTEL_GEN(dev_priv) >= 4 &&
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intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
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if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
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connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
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intel_sdvo_connector->is_hdmi = true;
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}
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@ -707,6 +707,9 @@ struct intel_sdvo_enhancements_arg {
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#define SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER 0x90
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#define SDVO_CMD_SET_AUDIO_STAT 0x91
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#define SDVO_CMD_GET_AUDIO_STAT 0x92
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#define SDVO_AUDIO_ELD_VALID (1 << 0)
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#define SDVO_AUDIO_PRESENCE_DETECT (1 << 1)
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#define SDVO_AUDIO_CP_READY (1 << 2)
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#define SDVO_CMD_SET_HBUF_INDEX 0x93
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#define SDVO_HBUF_INDEX_ELD 0
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#define SDVO_HBUF_INDEX_AVI_IF 1
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