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ARM: STi: DT: STiH407: Fix retime pin mask for PIO5 and PIO35 

This will avoid programming the retime registers when not implemented

- PIO5  : no retime registers assigned to pins 6 and 7
- PIO35 : pin 7 is reserved so no retime register assigned to it

Signed-off-by: Karim BEN BELGACEM <karim.ben-belgacem@st.com>
Acked-by: Maxime Coquelin <maxime.coquelin@st.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This commit is contained in:
Karim BEN BELGACEM 2015-03-18 18:21:00 +01:00 committed by Maxime Coquelin
parent 358764f306
commit d90accb913
1 changed files with 2 additions and 0 deletions
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2
arch/arm/boot/dts/stih407-pinctrl.dtsi
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@ -104,6 +104,7 @@ pio5: gpio@09615000 {
#interrupt-cells = <2>;
reg = <0x5000 0x100>;
st,bank-name = "PIO5";
st,retime-pin-mask = <0x3f>;
};
rc {
@ -519,6 +520,7 @@ pio35: gpio@09225000 {
#interrupt-cells = <2>;
reg = <0x5000 0x100>;
st,bank-name = "PIO35";
st,retime-pin-mask = <0x7f>;
};
i2c4 {