kvm: x86: Defer setting of CR2 until #PF delivery
When exception payloads are enabled by userspace (which is not yet possible) and a #PF is raised in L2, defer the setting of CR2 until the #PF is delivered. This allows the L1 hypervisor to intercept the fault before CR2 is modified. For backwards compatibility, when exception payloads are not enabled by userspace, kvm_multiple_exception modifies CR2 when the #PF exception is raised. Reported-by: Jim Mattson <jmattson@google.com> Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Jim Mattson <jmattson@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -805,6 +805,8 @@ static void svm_queue_exception(struct kvm_vcpu *vcpu)
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nested_svm_check_exception(svm, nr, has_error_code, error_code))
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return;
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kvm_deliver_exception_payload(&svm->vcpu);
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if (nr == BP_VECTOR && !static_cpu_has(X86_FEATURE_NRIPS)) {
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unsigned long rip, old_rip = kvm_rip_read(&svm->vcpu);
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@ -2965,16 +2967,13 @@ static int nested_svm_check_exception(struct vcpu_svm *svm, unsigned nr,
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svm->vmcb->control.exit_info_1 = error_code;
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/*
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* FIXME: we should not write CR2 when L1 intercepts an L2 #PF exception.
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* The fix is to add the ancillary datum (CR2 or DR6) to structs
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* kvm_queued_exception and kvm_vcpu_events, so that CR2 and DR6 can be
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* written only when inject_pending_event runs (DR6 would written here
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* too). This should be conditional on a new capability---if the
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* capability is disabled, kvm_multiple_exception would write the
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* ancillary information to CR2 or DR6, for backwards ABI-compatibility.
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* EXITINFO2 is undefined for all exception intercepts other
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* than #PF.
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*/
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if (svm->vcpu.arch.exception.nested_apf)
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svm->vmcb->control.exit_info_2 = svm->vcpu.arch.apf.nested_apf_token;
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else if (svm->vcpu.arch.exception.has_payload)
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svm->vmcb->control.exit_info_2 = svm->vcpu.arch.exception.payload;
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else
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svm->vmcb->control.exit_info_2 = svm->vcpu.arch.cr2;
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@ -3292,27 +3292,24 @@ static int nested_vmx_check_exception(struct kvm_vcpu *vcpu, unsigned long *exit
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{
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struct vmcs12 *vmcs12 = get_vmcs12(vcpu);
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unsigned int nr = vcpu->arch.exception.nr;
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bool has_payload = vcpu->arch.exception.has_payload;
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unsigned long payload = vcpu->arch.exception.payload;
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if (nr == PF_VECTOR) {
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if (vcpu->arch.exception.nested_apf) {
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*exit_qual = vcpu->arch.apf.nested_apf_token;
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return 1;
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}
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/*
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* FIXME: we must not write CR2 when L1 intercepts an L2 #PF exception.
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* The fix is to add the ancillary datum (CR2 or DR6) to structs
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* kvm_queued_exception and kvm_vcpu_events, so that CR2 and DR6
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* can be written only when inject_pending_event runs. This should be
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* conditional on a new capability---if the capability is disabled,
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* kvm_multiple_exception would write the ancillary information to
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* CR2 or DR6, for backwards ABI-compatibility.
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*/
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if (nested_vmx_is_page_fault_vmexit(vmcs12,
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vcpu->arch.exception.error_code)) {
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*exit_qual = vcpu->arch.cr2;
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*exit_qual = has_payload ? payload : vcpu->arch.cr2;
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return 1;
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}
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} else {
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/*
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* FIXME: we must not write DR6 when L1 intercepts an
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* L2 #DB exception.
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*/
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if (vmcs12->exception_bitmap & (1u << nr)) {
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if (nr == DB_VECTOR) {
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*exit_qual = vcpu->arch.dr6;
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@ -3349,6 +3346,8 @@ static void vmx_queue_exception(struct kvm_vcpu *vcpu)
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u32 error_code = vcpu->arch.exception.error_code;
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u32 intr_info = nr | INTR_INFO_VALID_MASK;
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kvm_deliver_exception_payload(vcpu);
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if (has_error_code) {
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vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE, error_code);
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intr_info |= INTR_INFO_DELIVER_CODE_MASK;
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@ -400,6 +400,26 @@ static int exception_type(int vector)
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return EXCPT_FAULT;
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}
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void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
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{
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unsigned nr = vcpu->arch.exception.nr;
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bool has_payload = vcpu->arch.exception.has_payload;
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unsigned long payload = vcpu->arch.exception.payload;
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if (!has_payload)
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return;
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switch (nr) {
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case PF_VECTOR:
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vcpu->arch.cr2 = payload;
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break;
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}
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vcpu->arch.exception.has_payload = false;
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vcpu->arch.exception.payload = 0;
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}
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EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
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static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
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unsigned nr, bool has_error, u32 error_code,
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bool has_payload, unsigned long payload, bool reinject)
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@ -441,6 +461,18 @@ static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
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vcpu->arch.exception.error_code = error_code;
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vcpu->arch.exception.has_payload = has_payload;
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vcpu->arch.exception.payload = payload;
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/*
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* In guest mode, payload delivery should be deferred,
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* so that the L1 hypervisor can intercept #PF before
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* CR2 is modified. However, for ABI compatibility
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* with KVM_GET_VCPU_EVENTS and KVM_SET_VCPU_EVENTS,
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* we can't delay payload delivery unless userspace
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* has enabled this functionality via the per-VM
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* capability, KVM_CAP_EXCEPTION_PAYLOAD.
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*/
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if (!vcpu->kvm->arch.exception_payload_enabled ||
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!is_guest_mode(vcpu))
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kvm_deliver_exception_payload(vcpu);
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return;
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}
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@ -486,6 +518,13 @@ void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
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}
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EXPORT_SYMBOL_GPL(kvm_requeue_exception);
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static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
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u32 error_code, unsigned long payload)
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{
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kvm_multiple_exception(vcpu, nr, true, error_code,
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true, payload, false);
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}
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int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
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{
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if (err)
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@ -502,11 +541,13 @@ void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
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++vcpu->stat.pf_guest;
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vcpu->arch.exception.nested_apf =
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is_guest_mode(vcpu) && fault->async_page_fault;
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if (vcpu->arch.exception.nested_apf)
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if (vcpu->arch.exception.nested_apf) {
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vcpu->arch.apf.nested_apf_token = fault->address;
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else
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vcpu->arch.cr2 = fault->address;
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kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
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kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
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} else {
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kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
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fault->address);
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}
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}
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EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
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@ -266,6 +266,8 @@ int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu,
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int handle_ud(struct kvm_vcpu *vcpu);
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void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu);
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void kvm_vcpu_mtrr_init(struct kvm_vcpu *vcpu);
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u8 kvm_mtrr_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn);
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bool kvm_mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data);
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