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ARM: imx: Add basic msl support for imx6sll 

Add basic MSL support for i.MX6SLL.

The i.MX 6SoloLiteLite application processors are NXP's latest
additions to a growing family of multimedia-focused products
offering high-performance processing optimized for lowest power
consumption. The i.MX 6SoloLiteLite processors feature NXP's advanced
implementation of the ARM Cortex-A9 core, which can be interfaced
with LPDDR3 and LPDDR2 DRAM memory devices.

Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Bai Ping 2018-03-08 17:34:55 +08:00 committed by Shawn Guo
parent 258172f96f
commit dee5dee2a5
6 changed files with 30 additions and 4 deletions
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7
arch/arm/mach-imx/Kconfig
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@ -499,6 +499,13 @@ config SOC_IMX6SL
help help
This enables support for Freescale i.MX6 SoloLite processor. This enables support for Freescale i.MX6 SoloLite processor.
config SOC_IMX6SLL
bool "i.MX6 SoloLiteLite support"
select SOC_IMX6
help
This enables support for Freescale i.MX6 SoloLiteLite processor.
config SOC_IMX6SX config SOC_IMX6SX
bool "i.MX6 SoloX support" bool "i.MX6 SoloX support"
select PINCTRL_IMX6SX select PINCTRL_IMX6SX

1
arch/arm/mach-imx/Makefile
View File

@ -77,6 +77,7 @@ obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
endif endif
obj-$(CONFIG_SOC_IMX6Q) += mach-imx6q.o obj-$(CONFIG_SOC_IMX6Q) += mach-imx6q.o
obj-$(CONFIG_SOC_IMX6SL) += mach-imx6sl.o obj-$(CONFIG_SOC_IMX6SL) += mach-imx6sl.o
obj-$(CONFIG_SOC_IMX6SLL) += mach-imx6sl.o
obj-$(CONFIG_SOC_IMX6SX) += mach-imx6sx.o obj-$(CONFIG_SOC_IMX6SX) += mach-imx6sx.o
obj-$(CONFIG_SOC_IMX6UL) += mach-imx6ul.o obj-$(CONFIG_SOC_IMX6UL) += mach-imx6ul.o
obj-$(CONFIG_SOC_IMX7D) += mach-imx7d.o obj-$(CONFIG_SOC_IMX7D) += mach-imx7d.o

3
arch/arm/mach-imx/cpu.c
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@ -135,6 +135,9 @@ struct device * __init imx_soc_device_init(void)
case MXC_CPU_IMX6ULL: case MXC_CPU_IMX6ULL:
soc_id = "i.MX6ULL"; soc_id = "i.MX6ULL";
break; break;
case MXC_CPU_IMX6SLL:
soc_id = "i.MX6SLL";
break;
case MXC_CPU_IMX7D: case MXC_CPU_IMX7D:
soc_id = "i.MX7D"; soc_id = "i.MX7D";
break; break;

7
arch/arm/mach-imx/cpuidle-imx6sl.c
View File

@ -12,6 +12,7 @@
#include "common.h" #include "common.h"
#include "cpuidle.h" #include "cpuidle.h"
#include "hardware.h"
static int imx6sl_enter_wait(struct cpuidle_device *dev, static int imx6sl_enter_wait(struct cpuidle_device *dev,
struct cpuidle_driver *drv, int index) struct cpuidle_driver *drv, int index)
@ -21,9 +22,11 @@ static int imx6sl_enter_wait(struct cpuidle_device *dev,
* Software workaround for ERR005311, see function * Software workaround for ERR005311, see function
* description for details. * description for details.
*/ */
imx6sl_set_wait_clk(true); if (cpu_is_imx6sl())
imx6sl_set_wait_clk(true);
cpu_do_idle(); cpu_do_idle();
imx6sl_set_wait_clk(false); if (cpu_is_imx6sl())
imx6sl_set_wait_clk(false);
imx6_set_lpm(WAIT_CLOCKED); imx6_set_lpm(WAIT_CLOCKED);
return index; return index;

10
arch/arm/mach-imx/mach-imx6sl.c
View File

@ -18,6 +18,7 @@
#include "common.h" #include "common.h"
#include "cpuidle.h" #include "cpuidle.h"
#include "hardware.h"
static void __init imx6sl_fec_init(void) static void __init imx6sl_fec_init(void)
{ {
@ -54,7 +55,8 @@ static void __init imx6sl_init_machine(void)
of_platform_default_populate(NULL, NULL, parent); of_platform_default_populate(NULL, NULL, parent);
imx6sl_fec_init(); if (cpu_is_imx6sl())
imx6sl_fec_init();
imx_anatop_init(); imx_anatop_init();
imx6sl_pm_init(); imx6sl_pm_init();
} }
@ -66,11 +68,15 @@ static void __init imx6sl_init_irq(void)
imx_init_l2cache(); imx_init_l2cache();
imx_src_init(); imx_src_init();
irqchip_init(); irqchip_init();
imx6_pm_ccm_init("fsl,imx6sl-ccm"); if (cpu_is_imx6sl())
imx6_pm_ccm_init("fsl,imx6sl-ccm");
else
imx6_pm_ccm_init("fsl,imx6sll-ccm");
} }
static const char * const imx6sl_dt_compat[] __initconst = { static const char * const imx6sl_dt_compat[] __initconst = {
"fsl,imx6sl", "fsl,imx6sl",
"fsl,imx6sll",
NULL, NULL,
}; };

6
arch/arm/mach-imx/mxc.h
View File

@ -40,6 +40,7 @@
#define MXC_CPU_IMX6Q 0x63 #define MXC_CPU_IMX6Q 0x63
#define MXC_CPU_IMX6UL 0x64 #define MXC_CPU_IMX6UL 0x64
#define MXC_CPU_IMX6ULL 0x65 #define MXC_CPU_IMX6ULL 0x65
#define MXC_CPU_IMX6SLL 0x67
#define MXC_CPU_IMX7D 0x72 #define MXC_CPU_IMX7D 0x72
#define IMX_DDR_TYPE_LPDDR2 1 #define IMX_DDR_TYPE_LPDDR2 1
@ -79,6 +80,11 @@ static inline bool cpu_is_imx6ull(void)
return __mxc_cpu_type == MXC_CPU_IMX6ULL; return __mxc_cpu_type == MXC_CPU_IMX6ULL;
} }
static inline bool cpu_is_imx6sll(void)
{
return __mxc_cpu_type == MXC_CPU_IMX6SLL;
}
static inline bool cpu_is_imx6q(void) static inline bool cpu_is_imx6q(void)
{ {
return __mxc_cpu_type == MXC_CPU_IMX6Q; return __mxc_cpu_type == MXC_CPU_IMX6Q;