PCI: designware: Make "clocks" and "clock-names" optional DT properties
Move the clock-related properties in the DesignWare PCIe controller bindings to 'optional' set of properties. [bhelgaas: move to separate patch] Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
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@ -14,11 +14,7 @@ Required properties:
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- interrupt-map-mask and interrupt-map: standard PCI properties
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to define the mapping of the PCIe interface to interrupt
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numbers.
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- clocks: Must contain an entry for each entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names: Must include the following entries:
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- "pcie"
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- "pcie_bus"
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- num-lanes: number of lanes to use
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Optional properties:
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- num-lanes: number of lanes to use (this property should be specified unless
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@ -27,3 +23,8 @@ Optional properties:
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- bus-range: PCI bus numbers covered (it is recommended for new devicetrees to
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specify this property, to keep backwards compatibility a range of 0x00-0xff
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is assumed if not present)
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- clocks: Must contain an entry for each entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names: Must include the following entries:
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- "pcie"
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- "pcie_bus"
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