[SCSI] be2iscsi: Fix doorbell format for EQ/CQ/RQ s per SLI spec.
The doorbel format has been updated to support additonal functionalities of SKH-R adapter. These changes are made such that older FW also works fine. Signed-off-by: John Soni Jose <sony.john-n@emulex.com> Signed-off-by: Jayamohan Kallickal <jayamohan.kallickal@emulex.com> Reviewed-by: Mike Christie <michaelc@cs.wisc.edu> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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@ -432,18 +432,6 @@ void beiscsi_async_link_state_process(struct beiscsi_hba *phba,
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}
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}
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static void beiscsi_cq_notify(struct beiscsi_hba *phba, u16 qid, bool arm,
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u16 num_popped)
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{
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u32 val = 0;
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val |= qid & DB_CQ_RING_ID_MASK;
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if (arm)
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val |= 1 << DB_CQ_REARM_SHIFT;
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val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
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iowrite32(val, phba->db_va + DB_CQ_OFFSET);
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}
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int beiscsi_process_mcc(struct beiscsi_hba *phba)
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{
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struct be_mcc_compl *compl;
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@ -474,7 +462,7 @@ int beiscsi_process_mcc(struct beiscsi_hba *phba)
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}
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if (num)
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beiscsi_cq_notify(phba, phba->ctrl.mcc_obj.cq.id, true, num);
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hwi_ring_cq_db(phba, phba->ctrl.mcc_obj.cq.id, num, 1, 0);
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spin_unlock_bh(&phba->ctrl.mcc_cq_lock);
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return status;
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@ -103,7 +103,7 @@ struct be_mcc_compl {
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/********** MCC door bell ************/
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#define DB_MCCQ_OFFSET 0x140
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#define DB_MCCQ_RING_ID_MASK 0x7FF /* bits 0 - 10 */
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#define DB_MCCQ_RING_ID_MASK 0xFFFF /* bits 0 - 15 */
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/* Number of entries posted */
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#define DB_MCCQ_NUM_POSTED_SHIFT 16 /* bits 16 - 29 */
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@ -1018,8 +1018,8 @@ struct be_mcc_wrb_context {
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int *users_final_status;
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} __packed;
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#define DB_DEF_PDU_RING_ID_MASK 0x3FF /* bits 0 - 9 */
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#define DB_DEF_PDU_CQPROC_MASK 0x3FFF /* bits 0 - 9 */
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#define DB_DEF_PDU_RING_ID_MASK 0x3FFF /* bits 0 - 13 */
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#define DB_DEF_PDU_CQPROC_MASK 0x3FFF /* bits 16 - 29 */
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#define DB_DEF_PDU_REARM_SHIFT 14
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#define DB_DEF_PDU_EVENT_SHIFT 15
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#define DB_DEF_PDU_CQPROC_SHIFT 16
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@ -809,14 +809,23 @@ static void hwi_ring_eq_db(struct beiscsi_hba *phba,
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unsigned char rearm, unsigned char event)
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{
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u32 val = 0;
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val |= id & DB_EQ_RING_ID_MASK;
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if (rearm)
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val |= 1 << DB_EQ_REARM_SHIFT;
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if (clr_interrupt)
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val |= 1 << DB_EQ_CLR_SHIFT;
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if (event)
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val |= 1 << DB_EQ_EVNT_SHIFT;
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val |= num_processed << DB_EQ_NUM_POPPED_SHIFT;
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/* Setting lower order EQ_ID Bits */
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val |= (id & DB_EQ_RING_ID_LOW_MASK);
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/* Setting Higher order EQ_ID Bits */
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val |= (((id >> DB_EQ_HIGH_FEILD_SHIFT) &
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DB_EQ_RING_ID_HIGH_MASK)
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<< DB_EQ_HIGH_SET_SHIFT);
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iowrite32(val, phba->db_va + DB_EQ_OFFSET);
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}
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@ -1098,15 +1107,25 @@ static int beiscsi_init_irqs(struct beiscsi_hba *phba)
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return ret;
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}
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static void hwi_ring_cq_db(struct beiscsi_hba *phba,
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void hwi_ring_cq_db(struct beiscsi_hba *phba,
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unsigned int id, unsigned int num_processed,
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unsigned char rearm, unsigned char event)
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{
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u32 val = 0;
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val |= id & DB_CQ_RING_ID_MASK;
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if (rearm)
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val |= 1 << DB_CQ_REARM_SHIFT;
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val |= num_processed << DB_CQ_NUM_POPPED_SHIFT;
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/* Setting lower order CQ_ID Bits */
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val |= (id & DB_CQ_RING_ID_LOW_MASK);
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/* Setting Higher order CQ_ID Bits */
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val |= (((id >> DB_CQ_HIGH_FEILD_SHIFT) &
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DB_CQ_RING_ID_HIGH_MASK)
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<< DB_CQ_HIGH_SET_SHIFT);
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iowrite32(val, phba->db_va + DB_CQ_OFFSET);
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}
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@ -135,11 +135,15 @@
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#define DB_RXULP0_OFFSET 0xA0
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/********* Event Q door bell *************/
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#define DB_EQ_OFFSET DB_CQ_OFFSET
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#define DB_EQ_RING_ID_MASK 0x1FF /* bits 0 - 8 */
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#define DB_EQ_RING_ID_LOW_MASK 0x1FF /* bits 0 - 8 */
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/* Clear the interrupt for this eq */
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#define DB_EQ_CLR_SHIFT (9) /* bit 9 */
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/* Must be 1 */
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#define DB_EQ_EVNT_SHIFT (10) /* bit 10 */
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/* Higher Order EQ_ID bit */
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#define DB_EQ_RING_ID_HIGH_MASK 0x1F /* bits 11 - 15 */
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#define DB_EQ_HIGH_SET_SHIFT 11
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#define DB_EQ_HIGH_FEILD_SHIFT 9
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/* Number of event entries processed */
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#define DB_EQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
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/* Rearm bit */
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@ -147,7 +151,12 @@
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/********* Compl Q door bell *************/
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#define DB_CQ_OFFSET 0x120
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#define DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
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#define DB_CQ_RING_ID_LOW_MASK 0x3FF /* bits 0 - 9 */
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/* Higher Order CQ_ID bit */
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#define DB_CQ_RING_ID_HIGH_MASK 0x1F /* bits 11 - 15 */
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#define DB_CQ_HIGH_SET_SHIFT 11
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#define DB_CQ_HIGH_FEILD_SHIFT 10
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/* Number of event entries processed */
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#define DB_CQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
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/* Rearm bit */
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@ -821,6 +830,9 @@ void beiscsi_process_all_cqs(struct work_struct *work);
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void beiscsi_free_mgmt_task_handles(struct beiscsi_conn *beiscsi_conn,
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struct iscsi_task *task);
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void hwi_ring_cq_db(struct beiscsi_hba *phba,
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unsigned int id, unsigned int num_processed,
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unsigned char rearm, unsigned char event);
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static inline bool beiscsi_error(struct beiscsi_hba *phba)
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{
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return phba->ue_detected || phba->fw_timeout;
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