ia64/tlb: Convert to generic mmu_gather
Generic mmu_gather provides everything ia64 needs (range tracking). No change in behavior intended. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andy Lutomirski <luto@kernel.org> Cc: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Cc: Borislav Petkov <bp@alien8.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Nick Piggin <npiggin@gmail.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@surriel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Tony Luck <tony.luck@intel.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Peter Zijlstra
Ingo Molnar
parent
b78180b97d
commit
e154700774
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@ -47,262 +47,8 @@
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#include <asm/tlbflush.h>
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#include <asm/machvec.h>
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/*
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* If we can't allocate a page to make a big batch of page pointers
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* to work on, then just handle a few from the on-stack structure.
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*/
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#define IA64_GATHER_BUNDLE 8
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struct mmu_gather {
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struct mm_struct *mm;
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unsigned int nr;
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unsigned int max;
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unsigned char fullmm; /* non-zero means full mm flush */
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unsigned char need_flush; /* really unmapped some PTEs? */
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unsigned long start, end;
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unsigned long start_addr;
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unsigned long end_addr;
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struct page **pages;
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struct page *local[IA64_GATHER_BUNDLE];
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};
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struct ia64_tr_entry {
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u64 ifa;
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u64 itir;
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u64 pte;
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u64 rr;
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}; /*Record for tr entry!*/
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extern int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size);
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extern void ia64_ptr_entry(u64 target_mask, int slot);
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extern struct ia64_tr_entry *ia64_idtrs[NR_CPUS];
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/*
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region register macros
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*/
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#define RR_TO_VE(val) (((val) >> 0) & 0x0000000000000001)
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#define RR_VE(val) (((val) & 0x0000000000000001) << 0)
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#define RR_VE_MASK 0x0000000000000001L
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#define RR_VE_SHIFT 0
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#define RR_TO_PS(val) (((val) >> 2) & 0x000000000000003f)
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#define RR_PS(val) (((val) & 0x000000000000003f) << 2)
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#define RR_PS_MASK 0x00000000000000fcL
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#define RR_PS_SHIFT 2
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#define RR_RID_MASK 0x00000000ffffff00L
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#define RR_TO_RID(val) ((val >> 8) & 0xffffff)
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static inline void
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ia64_tlb_flush_mmu_tlbonly(struct mmu_gather *tlb, unsigned long start, unsigned long end)
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{
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tlb->need_flush = 0;
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if (tlb->fullmm) {
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/*
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* Tearing down the entire address space. This happens both as a result
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* of exit() and execve(). The latter case necessitates the call to
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* flush_tlb_mm() here.
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*/
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flush_tlb_mm(tlb->mm);
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} else if (unlikely (end - start >= 1024*1024*1024*1024UL
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|| REGION_NUMBER(start) != REGION_NUMBER(end - 1)))
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{
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/*
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* If we flush more than a tera-byte or across regions, we're probably
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* better off just flushing the entire TLB(s). This should be very rare
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* and is not worth optimizing for.
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*/
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flush_tlb_all();
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} else {
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/*
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* flush_tlb_range() takes a vma instead of a mm pointer because
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* some architectures want the vm_flags for ITLB/DTLB flush.
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*/
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struct vm_area_struct vma = TLB_FLUSH_VMA(tlb->mm, 0);
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/* flush the address range from the tlb: */
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flush_tlb_range(&vma, start, end);
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/* now flush the virt. page-table area mapping the address range: */
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flush_tlb_range(&vma, ia64_thash(start), ia64_thash(end));
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}
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}
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static inline void
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ia64_tlb_flush_mmu_free(struct mmu_gather *tlb)
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{
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unsigned long i;
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unsigned int nr;
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/* lastly, release the freed pages */
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nr = tlb->nr;
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tlb->nr = 0;
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tlb->start_addr = ~0UL;
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for (i = 0; i < nr; ++i)
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free_page_and_swap_cache(tlb->pages[i]);
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}
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/*
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* Flush the TLB for address range START to END and, if not in fast mode, release the
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* freed pages that where gathered up to this point.
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*/
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static inline void
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ia64_tlb_flush_mmu (struct mmu_gather *tlb, unsigned long start, unsigned long end)
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{
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if (!tlb->need_flush)
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return;
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ia64_tlb_flush_mmu_tlbonly(tlb, start, end);
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ia64_tlb_flush_mmu_free(tlb);
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}
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static inline void __tlb_alloc_page(struct mmu_gather *tlb)
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{
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unsigned long addr = __get_free_pages(GFP_NOWAIT | __GFP_NOWARN, 0);
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if (addr) {
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tlb->pages = (void *)addr;
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tlb->max = PAGE_SIZE / sizeof(void *);
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}
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}
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static inline void
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arch_tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm,
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unsigned long start, unsigned long end)
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{
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tlb->mm = mm;
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tlb->max = ARRAY_SIZE(tlb->local);
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tlb->pages = tlb->local;
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tlb->nr = 0;
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tlb->fullmm = !(start | (end+1));
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tlb->start = start;
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tlb->end = end;
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tlb->start_addr = ~0UL;
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}
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/*
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* Called at the end of the shootdown operation to free up any resources that were
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* collected.
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*/
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static inline void
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arch_tlb_finish_mmu(struct mmu_gather *tlb,
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unsigned long start, unsigned long end, bool force)
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{
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if (force)
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tlb->need_flush = 1;
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/*
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* Note: tlb->nr may be 0 at this point, so we can't rely on tlb->start_addr and
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* tlb->end_addr.
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*/
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ia64_tlb_flush_mmu(tlb, start, end);
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/* keep the page table cache within bounds */
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check_pgt_cache();
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if (tlb->pages != tlb->local)
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free_pages((unsigned long)tlb->pages, 0);
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}
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/*
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* Logically, this routine frees PAGE. On MP machines, the actual freeing of the page
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* must be delayed until after the TLB has been flushed (see comments at the beginning of
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* this file).
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*/
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static inline bool __tlb_remove_page(struct mmu_gather *tlb, struct page *page)
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{
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tlb->need_flush = 1;
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if (!tlb->nr && tlb->pages == tlb->local)
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__tlb_alloc_page(tlb);
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tlb->pages[tlb->nr++] = page;
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VM_WARN_ON(tlb->nr > tlb->max);
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if (tlb->nr == tlb->max)
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return true;
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return false;
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}
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static inline void tlb_flush_mmu_tlbonly(struct mmu_gather *tlb)
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{
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ia64_tlb_flush_mmu_tlbonly(tlb, tlb->start_addr, tlb->end_addr);
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}
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static inline void tlb_flush_mmu_free(struct mmu_gather *tlb)
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{
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ia64_tlb_flush_mmu_free(tlb);
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}
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static inline void tlb_flush_mmu(struct mmu_gather *tlb)
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{
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ia64_tlb_flush_mmu(tlb, tlb->start_addr, tlb->end_addr);
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}
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static inline void tlb_remove_page(struct mmu_gather *tlb, struct page *page)
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{
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if (__tlb_remove_page(tlb, page))
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tlb_flush_mmu(tlb);
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}
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static inline bool __tlb_remove_page_size(struct mmu_gather *tlb,
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struct page *page, int page_size)
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{
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return __tlb_remove_page(tlb, page);
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}
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static inline void tlb_remove_page_size(struct mmu_gather *tlb,
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struct page *page, int page_size)
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{
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return tlb_remove_page(tlb, page);
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}
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/*
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* Remove TLB entry for PTE mapped at virtual address ADDRESS. This is called for any
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* PTE, not just those pointing to (normal) physical memory.
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*/
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static inline void
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__tlb_remove_tlb_entry (struct mmu_gather *tlb, pte_t *ptep, unsigned long address)
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{
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if (tlb->start_addr == ~0UL)
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tlb->start_addr = address;
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tlb->end_addr = address + PAGE_SIZE;
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}
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#define tlb_migrate_finish(mm) platform_tlb_migrate_finish(mm)
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#define tlb_start_vma(tlb, vma) do { } while (0)
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#define tlb_end_vma(tlb, vma) do { } while (0)
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#define tlb_remove_tlb_entry(tlb, ptep, addr) \
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do { \
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tlb->need_flush = 1; \
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__tlb_remove_tlb_entry(tlb, ptep, addr); \
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} while (0)
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#define tlb_remove_huge_tlb_entry(h, tlb, ptep, address) \
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tlb_remove_tlb_entry(tlb, ptep, address)
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static inline void tlb_change_page_size(struct mmu_gather *tlb,
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unsigned int page_size)
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{
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}
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#define pte_free_tlb(tlb, ptep, address) \
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do { \
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tlb->need_flush = 1; \
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__pte_free_tlb(tlb, ptep, address); \
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} while (0)
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#define pmd_free_tlb(tlb, ptep, address) \
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do { \
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tlb->need_flush = 1; \
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__pmd_free_tlb(tlb, ptep, address); \
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} while (0)
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#define pud_free_tlb(tlb, pudp, address) \
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do { \
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tlb->need_flush = 1; \
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__pud_free_tlb(tlb, pudp, address); \
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} while (0)
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#include <asm-generic/tlb.h>
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#endif /* _ASM_IA64_TLB_H */
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@ -14,6 +14,31 @@
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#include <asm/mmu_context.h>
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#include <asm/page.h>
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struct ia64_tr_entry {
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u64 ifa;
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u64 itir;
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u64 pte;
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u64 rr;
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}; /*Record for tr entry!*/
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extern int ia64_itr_entry(u64 target_mask, u64 va, u64 pte, u64 log_size);
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extern void ia64_ptr_entry(u64 target_mask, int slot);
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extern struct ia64_tr_entry *ia64_idtrs[NR_CPUS];
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/*
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region register macros
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*/
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#define RR_TO_VE(val) (((val) >> 0) & 0x0000000000000001)
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#define RR_VE(val) (((val) & 0x0000000000000001) << 0)
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#define RR_VE_MASK 0x0000000000000001L
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#define RR_VE_SHIFT 0
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#define RR_TO_PS(val) (((val) >> 2) & 0x000000000000003f)
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#define RR_PS(val) (((val) & 0x000000000000003f) << 2)
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#define RR_PS_MASK 0x00000000000000fcL
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#define RR_PS_SHIFT 2
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#define RR_RID_MASK 0x00000000ffffff00L
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#define RR_TO_RID(val) ((val >> 8) & 0xffffff)
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/*
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* Now for some TLB flushing routines. This is the kind of stuff that
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* can be very expensive, so try to avoid them whenever possible.
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@ -305,8 +305,8 @@ local_flush_tlb_all (void)
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ia64_srlz_i(); /* srlz.i implies srlz.d */
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}
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void
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flush_tlb_range (struct vm_area_struct *vma, unsigned long start,
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static void
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__flush_tlb_range (struct vm_area_struct *vma, unsigned long start,
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unsigned long end)
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{
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struct mm_struct *mm = vma->vm_mm;
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@ -343,6 +343,25 @@ flush_tlb_range (struct vm_area_struct *vma, unsigned long start,
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preempt_enable();
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ia64_srlz_i(); /* srlz.i implies srlz.d */
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}
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void flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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if (unlikely(end - start >= 1024*1024*1024*1024UL
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|| REGION_NUMBER(start) != REGION_NUMBER(end - 1))) {
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/*
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* If we flush more than a tera-byte or across regions, we're
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* probably better off just flushing the entire TLB(s). This
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* should be very rare and is not worth optimizing for.
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*/
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flush_tlb_all();
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} else {
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/* flush the address range from the tlb */
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__flush_tlb_range(vma, start, end);
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/* flush the virt. page-table area mapping the addr range */
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__flush_tlb_range(vma, ia64_thash(start), ia64_thash(end));
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}
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}
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EXPORT_SYMBOL(flush_tlb_range);
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void ia64_tlb_init(void)
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