ARM: integrator: move CP CLCD display to DTS
The Integrator/CP CLCD VGA display can now be registered fully from the device tree. Delete the board file code and add the display definition to the DTS. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -226,7 +226,42 @@ clcd@c0000000 {
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reg = <0xC0000000 0x1000>;
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interrupts = <22>;
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clocks = <&auxosc>, <&pclk>;
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clock-names = "clcd", "apb_pclk";
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clock-names = "clcdclk", "apb_pclk";
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port {
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/*
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* The VGA connected is implemented with a
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* THS8134A triple DAC that can be run in 24bit
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* or 16bit RGB mode.
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*/
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clcd_pads: endpoint {
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remote-endpoint = <&clcd_panel>;
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arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
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};
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};
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panel {
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compatible = "panel-dpi";
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port {
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clcd_panel: endpoint {
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remote-endpoint = <&clcd_pads>;
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};
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};
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/* Standard 640x480 VGA timings */
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panel-timing {
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clock-frequency = <25175000>;
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hactive = <640>;
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hback-porch = <48>;
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hfront-porch = <16>;
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hsync-len = <96>;
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vactive = <480>;
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vback-porch = <33>;
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vfront-porch = <10>;
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vsync-len = <2>;
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};
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};
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};
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};
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};
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@ -17,8 +17,6 @@
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#include <linux/device.h>
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#include <linux/amba/bus.h>
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#include <linux/amba/kmi.h>
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#include <linux/amba/clcd.h>
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#include <linux/platform_data/video-clcd-versatile.h>
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#include <linux/amba/mmci.h>
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#include <linux/io.h>
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#include <linux/irqchip.h>
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@ -42,8 +40,6 @@
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/* Base address to the CP controller */
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static void __iomem *intcp_con_base;
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#define INTCP_PA_CLCD_BASE 0xc0000000
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/*
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* Logical Physical
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* f1000000 10000000 Core module registers
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@ -121,57 +117,6 @@ static struct mmci_platform_data mmc_data = {
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.gpio_cd = -1,
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};
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/*
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* CLCD support
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*/
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/*
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* Ensure VGA is selected.
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*/
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static void cp_clcd_enable(struct clcd_fb *fb)
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{
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struct fb_var_screeninfo *var = &fb->fb.var;
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u32 val = CM_CTRL_STATIC1 | CM_CTRL_STATIC2
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| CM_CTRL_LCDEN0 | CM_CTRL_LCDEN1;
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if (var->bits_per_pixel <= 8 ||
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(var->bits_per_pixel == 16 && var->green.length == 5))
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/* Pseudocolor, RGB555, BGR555 */
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val |= CM_CTRL_LCDMUXSEL_VGA555_TFT555;
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else if (fb->fb.var.bits_per_pixel <= 16)
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/* truecolor RGB565 */
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val |= CM_CTRL_LCDMUXSEL_VGA565_TFT555;
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else
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val = 0; /* no idea for this, don't trust the docs */
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cm_control(CM_CTRL_LCDMUXSEL_MASK|
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CM_CTRL_LCDEN0|
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CM_CTRL_LCDEN1|
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CM_CTRL_STATIC1|
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CM_CTRL_STATIC2|
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CM_CTRL_STATIC|
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CM_CTRL_n24BITEN, val);
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}
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static int cp_clcd_setup(struct clcd_fb *fb)
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{
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fb->panel = versatile_clcd_get_panel("VGA");
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if (!fb->panel)
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return -EINVAL;
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return versatile_clcd_setup_dma(fb, SZ_1M);
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}
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static struct clcd_board clcd_data = {
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.name = "Integrator/CP",
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.caps = CLCD_CAP_5551 | CLCD_CAP_RGB565 | CLCD_CAP_888,
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.check = clcdfb_check,
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.decode = clcdfb_decode,
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.enable = cp_clcd_enable,
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.setup = cp_clcd_setup,
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.mmap = versatile_clcd_mmap_dma,
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.remove = versatile_clcd_remove_dma,
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};
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#define REFCOUNTER (__io_address(INTEGRATOR_HDR_BASE) + 0x28)
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static u64 notrace intcp_read_sched_clock(void)
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@ -209,8 +154,6 @@ static struct of_dev_auxdata intcp_auxdata_lookup[] __initdata = {
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"mmci", &mmc_data),
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OF_DEV_AUXDATA("arm,primecell", INTEGRATOR_CP_AACI_BASE,
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"aaci", &mmc_data),
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OF_DEV_AUXDATA("arm,primecell", INTCP_PA_CLCD_BASE,
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"clcd", &clcd_data),
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{ /* sentinel */ },
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};
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