iio: adc: exynos_adc: Add exynos_adc_data structure to improve readability
This patchset add 'exynos_adc_data' structure which includes some functions to control ADC operation and specific data according to ADC version (v1 or v2). Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Chanwoo Choi
Jonathan Cameron
parent
d3f1621960
commit
e49d99e0ec
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@ -39,11 +39,6 @@
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#include <linux/iio/machine.h>
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#include <linux/iio/driver.h>
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enum adc_version {
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ADC_V1,
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ADC_V2
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};
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/* EXYNOS4412/5250 ADC_V1 registers definitions */
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#define ADC_V1_CON(x) ((x) + 0x00)
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#define ADC_V1_DLY(x) ((x) + 0x08)
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@ -85,6 +80,7 @@ enum adc_version {
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#define EXYNOS_ADC_TIMEOUT (msecs_to_jiffies(100))
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struct exynos_adc {
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struct exynos_adc_data *data;
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void __iomem *regs;
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void __iomem *enable_reg;
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struct clk *clk;
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@ -97,43 +93,139 @@ struct exynos_adc {
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unsigned int version;
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};
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struct exynos_adc_data {
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int num_channels;
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void (*init_hw)(struct exynos_adc *info);
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void (*exit_hw)(struct exynos_adc *info);
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void (*clear_irq)(struct exynos_adc *info);
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void (*start_conv)(struct exynos_adc *info, unsigned long addr);
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};
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static void exynos_adc_v1_init_hw(struct exynos_adc *info)
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{
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u32 con1;
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writel(1, info->enable_reg);
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/* set default prescaler values and Enable prescaler */
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con1 = ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
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/* Enable 12-bit ADC resolution */
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con1 |= ADC_V1_CON_RES;
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writel(con1, ADC_V1_CON(info->regs));
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}
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static void exynos_adc_v1_exit_hw(struct exynos_adc *info)
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{
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u32 con;
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writel(0, info->enable_reg);
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con = readl(ADC_V1_CON(info->regs));
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con |= ADC_V1_CON_STANDBY;
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writel(con, ADC_V1_CON(info->regs));
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}
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static void exynos_adc_v1_clear_irq(struct exynos_adc *info)
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{
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writel(1, ADC_V1_INTCLR(info->regs));
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}
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static void exynos_adc_v1_start_conv(struct exynos_adc *info,
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unsigned long addr)
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{
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u32 con1;
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writel(addr, ADC_V1_MUX(info->regs));
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con1 = readl(ADC_V1_CON(info->regs));
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writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs));
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}
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static const struct exynos_adc_data exynos_adc_v1_data = {
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.num_channels = MAX_ADC_V1_CHANNELS,
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.init_hw = exynos_adc_v1_init_hw,
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.exit_hw = exynos_adc_v1_exit_hw,
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.clear_irq = exynos_adc_v1_clear_irq,
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.start_conv = exynos_adc_v1_start_conv,
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};
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static void exynos_adc_v2_init_hw(struct exynos_adc *info)
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{
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u32 con1, con2;
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writel(1, info->enable_reg);
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con1 = ADC_V2_CON1_SOFT_RESET;
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writel(con1, ADC_V2_CON1(info->regs));
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con2 = ADC_V2_CON2_OSEL | ADC_V2_CON2_ESEL |
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ADC_V2_CON2_HIGHF | ADC_V2_CON2_C_TIME(0);
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writel(con2, ADC_V2_CON2(info->regs));
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/* Enable interrupts */
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writel(1, ADC_V2_INT_EN(info->regs));
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}
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static void exynos_adc_v2_exit_hw(struct exynos_adc *info)
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{
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u32 con;
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writel(0, info->enable_reg);
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con = readl(ADC_V2_CON1(info->regs));
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con &= ~ADC_CON_EN_START;
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writel(con, ADC_V2_CON1(info->regs));
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}
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static void exynos_adc_v2_clear_irq(struct exynos_adc *info)
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{
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writel(1, ADC_V2_INT_ST(info->regs));
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}
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static void exynos_adc_v2_start_conv(struct exynos_adc *info,
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unsigned long addr)
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{
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u32 con1, con2;
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con2 = readl(ADC_V2_CON2(info->regs));
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con2 &= ~ADC_V2_CON2_ACH_MASK;
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con2 |= ADC_V2_CON2_ACH_SEL(addr);
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writel(con2, ADC_V2_CON2(info->regs));
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con1 = readl(ADC_V2_CON1(info->regs));
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writel(con1 | ADC_CON_EN_START, ADC_V2_CON1(info->regs));
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}
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static const struct exynos_adc_data exynos_adc_v2_data = {
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.num_channels = MAX_ADC_V2_CHANNELS,
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.init_hw = exynos_adc_v2_init_hw,
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.exit_hw = exynos_adc_v2_exit_hw,
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.clear_irq = exynos_adc_v2_clear_irq,
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.start_conv = exynos_adc_v2_start_conv,
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};
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static const struct of_device_id exynos_adc_match[] = {
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{ .compatible = "samsung,exynos-adc-v1", .data = (void *)ADC_V1 },
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{ .compatible = "samsung,exynos-adc-v2", .data = (void *)ADC_V2 },
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{
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.compatible = "samsung,exynos-adc-v1",
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.data = &exynos_adc_v1_data,
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}, {
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.compatible = "samsung,exynos-adc-v2",
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.data = &exynos_adc_v2_data,
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},
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{},
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};
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MODULE_DEVICE_TABLE(of, exynos_adc_match);
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static inline unsigned int exynos_adc_get_version(struct platform_device *pdev)
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static struct exynos_adc_data *exynos_adc_get_data(struct platform_device *pdev)
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{
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const struct of_device_id *match;
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match = of_match_node(exynos_adc_match, pdev->dev.of_node);
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return (unsigned int)match->data;
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}
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static void exynos_adc_hw_init(struct exynos_adc *info)
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{
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u32 con1, con2;
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if (info->version == ADC_V2) {
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con1 = ADC_V2_CON1_SOFT_RESET;
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writel(con1, ADC_V2_CON1(info->regs));
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con2 = ADC_V2_CON2_OSEL | ADC_V2_CON2_ESEL |
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ADC_V2_CON2_HIGHF | ADC_V2_CON2_C_TIME(0);
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writel(con2, ADC_V2_CON2(info->regs));
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/* Enable interrupts */
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writel(1, ADC_V2_INT_EN(info->regs));
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} else {
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/* set default prescaler values and Enable prescaler */
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con1 = ADC_V1_CON_PRSCLV(49) | ADC_V1_CON_PRSCEN;
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/* Enable 12-bit ADC resolution */
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con1 |= ADC_V1_CON_RES;
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writel(con1, ADC_V1_CON(info->regs));
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}
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return (struct exynos_adc_data *)match->data;
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}
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static int exynos_read_raw(struct iio_dev *indio_dev,
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@ -144,7 +236,6 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
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{
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struct exynos_adc *info = iio_priv(indio_dev);
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unsigned long timeout;
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u32 con1, con2;
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int ret;
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if (mask != IIO_CHAN_INFO_RAW)
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@ -154,28 +245,15 @@ static int exynos_read_raw(struct iio_dev *indio_dev,
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reinit_completion(&info->completion);
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/* Select the channel to be used and Trigger conversion */
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if (info->version == ADC_V2) {
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con2 = readl(ADC_V2_CON2(info->regs));
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con2 &= ~ADC_V2_CON2_ACH_MASK;
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con2 |= ADC_V2_CON2_ACH_SEL(chan->address);
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writel(con2, ADC_V2_CON2(info->regs));
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con1 = readl(ADC_V2_CON1(info->regs));
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writel(con1 | ADC_CON_EN_START,
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ADC_V2_CON1(info->regs));
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} else {
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writel(chan->address, ADC_V1_MUX(info->regs));
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con1 = readl(ADC_V1_CON(info->regs));
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writel(con1 | ADC_CON_EN_START,
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ADC_V1_CON(info->regs));
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}
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if (info->data->start_conv)
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info->data->start_conv(info, chan->address);
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timeout = wait_for_completion_timeout
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(&info->completion, EXYNOS_ADC_TIMEOUT);
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if (timeout == 0) {
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dev_warn(&indio_dev->dev, "Conversion timed out! Resetting\n");
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exynos_adc_hw_init(info);
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if (info->data->init_hw)
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info->data->init_hw(info);
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ret = -ETIMEDOUT;
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} else {
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*val = info->value;
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@ -193,13 +271,11 @@ static irqreturn_t exynos_adc_isr(int irq, void *dev_id)
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struct exynos_adc *info = (struct exynos_adc *)dev_id;
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/* Read value */
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info->value = readl(ADC_V1_DATX(info->regs)) &
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ADC_DATX_MASK;
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info->value = readl(ADC_V1_DATX(info->regs)) & ADC_DATX_MASK;
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/* clear irq */
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if (info->version == ADC_V2)
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writel(1, ADC_V2_INT_ST(info->regs));
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else
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writel(1, ADC_V1_INTCLR(info->regs));
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if (info->data->clear_irq)
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info->data->clear_irq(info);
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complete(&info->completion);
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@ -277,6 +353,12 @@ static int exynos_adc_probe(struct platform_device *pdev)
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info = iio_priv(indio_dev);
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info->data = exynos_adc_get_data(pdev);
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if (!info->data) {
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dev_err(&pdev->dev, "failed getting exynos_adc_data\n");
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return -EINVAL;
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}
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mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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info->regs = devm_ioremap_resource(&pdev->dev, mem);
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if (IS_ERR(info->regs))
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@ -319,10 +401,6 @@ static int exynos_adc_probe(struct platform_device *pdev)
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if (ret)
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goto err_disable_reg;
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writel(1, info->enable_reg);
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info->version = exynos_adc_get_version(pdev);
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platform_set_drvdata(pdev, indio_dev);
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indio_dev->name = dev_name(&pdev->dev);
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@ -331,11 +409,7 @@ static int exynos_adc_probe(struct platform_device *pdev)
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indio_dev->info = &exynos_adc_iio_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = exynos_adc_iio_channels;
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if (info->version == ADC_V1)
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indio_dev->num_channels = MAX_ADC_V1_CHANNELS;
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else
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indio_dev->num_channels = MAX_ADC_V2_CHANNELS;
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indio_dev->num_channels = info->data->num_channels;
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ret = request_irq(info->irq, exynos_adc_isr,
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0, dev_name(&pdev->dev), info);
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@ -349,7 +423,8 @@ static int exynos_adc_probe(struct platform_device *pdev)
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if (ret)
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goto err_irq;
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exynos_adc_hw_init(info);
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if (info->data->init_hw)
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info->data->init_hw(info);
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ret = of_platform_populate(np, exynos_adc_match, NULL, &indio_dev->dev);
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if (ret < 0) {
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@ -366,7 +441,8 @@ static int exynos_adc_probe(struct platform_device *pdev)
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err_irq:
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free_irq(info->irq, info);
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err_disable_clk:
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writel(0, info->enable_reg);
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if (info->data->exit_hw)
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info->data->exit_hw(info);
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clk_disable_unprepare(info->clk);
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err_disable_reg:
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regulator_disable(info->vdd);
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@ -382,7 +458,8 @@ static int exynos_adc_remove(struct platform_device *pdev)
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exynos_adc_remove_devices);
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iio_device_unregister(indio_dev);
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free_irq(info->irq, info);
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writel(0, info->enable_reg);
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if (info->data->exit_hw)
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info->data->exit_hw(info);
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clk_disable_unprepare(info->clk);
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regulator_disable(info->vdd);
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@ -394,19 +471,10 @@ static int exynos_adc_suspend(struct device *dev)
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{
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct exynos_adc *info = iio_priv(indio_dev);
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u32 con;
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if (info->version == ADC_V2) {
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con = readl(ADC_V2_CON1(info->regs));
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con &= ~ADC_CON_EN_START;
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writel(con, ADC_V2_CON1(info->regs));
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} else {
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con = readl(ADC_V1_CON(info->regs));
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con |= ADC_V1_CON_STANDBY;
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writel(con, ADC_V1_CON(info->regs));
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}
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if (info->data->exit_hw)
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info->data->exit_hw(info);
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writel(0, info->enable_reg);
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clk_disable_unprepare(info->clk);
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regulator_disable(info->vdd);
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@ -427,8 +495,8 @@ static int exynos_adc_resume(struct device *dev)
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if (ret)
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return ret;
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writel(1, info->enable_reg);
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exynos_adc_hw_init(info);
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if (info->data->init_hw)
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info->data->init_hw(info);
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return 0;
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}
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