Revert "ARM: dts: imx: use dual-fifo sdma script for ssi"
This reverts commit b1d27c79c8
.
Previously we switched the SSI scriprt to dual-fifo mode to reduce playback
underrun issue, which is only included by SDMA firmware version 2. However,
there are quite a lot people still using version 1 or default firmware in
the ROM code of SoC while these two kinds of firmwares do not support the
dual-fifo script and the audio function on their platform would be broken.
Thus this patch provisionally reverts the dual-fifo script to the original
single fifo script to meet all kinds of users' requirements, including the
version 1/2 or inner ROM firmware.
Reported-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
parent
6fb9063ca2
commit
e5b2886145
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@ -159,8 +159,8 @@ ssi2: ssi@70014000 {
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reg = <0x70014000 0x4000>;
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interrupts = <30>;
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clocks = <&clks 49>;
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dmas = <&sdma 24 22 0>,
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<&sdma 25 22 0>;
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dmas = <&sdma 24 1 0>,
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<&sdma 25 1 0>;
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dma-names = "rx", "tx";
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fsl,fifo-depth = <15>;
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fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
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@ -153,8 +153,8 @@ ssi2: ssi@50014000 {
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reg = <0x50014000 0x4000>;
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interrupts = <30>;
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clocks = <&clks 49>;
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dmas = <&sdma 24 22 0>,
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<&sdma 25 22 0>;
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dmas = <&sdma 24 1 0>,
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<&sdma 25 1 0>;
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dma-names = "rx", "tx";
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fsl,fifo-depth = <15>;
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fsl,ssi-dma-events = <25 24 23 22>; /* TX0 RX0 TX1 RX1 */
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@ -236,8 +236,8 @@ ssi1: ssi@02028000 {
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reg = <0x02028000 0x4000>;
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interrupts = <0 46 0x04>;
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clocks = <&clks 178>;
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dmas = <&sdma 37 22 0>,
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<&sdma 38 22 0>;
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dmas = <&sdma 37 1 0>,
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<&sdma 38 1 0>;
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dma-names = "rx", "tx";
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fsl,fifo-depth = <15>;
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fsl,ssi-dma-events = <38 37>;
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@ -249,8 +249,8 @@ ssi2: ssi@0202c000 {
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reg = <0x0202c000 0x4000>;
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interrupts = <0 47 0x04>;
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clocks = <&clks 179>;
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dmas = <&sdma 41 22 0>,
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<&sdma 42 22 0>;
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dmas = <&sdma 41 1 0>,
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<&sdma 42 1 0>;
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dma-names = "rx", "tx";
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fsl,fifo-depth = <15>;
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fsl,ssi-dma-events = <42 41>;
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@ -262,8 +262,8 @@ ssi3: ssi@02030000 {
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reg = <0x02030000 0x4000>;
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interrupts = <0 48 0x04>;
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clocks = <&clks 180>;
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dmas = <&sdma 45 22 0>,
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<&sdma 46 22 0>;
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dmas = <&sdma 45 1 0>,
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<&sdma 46 1 0>;
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dma-names = "rx", "tx";
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fsl,fifo-depth = <15>;
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fsl,ssi-dma-events = <46 45>;
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@ -199,8 +199,8 @@ ssi1: ssi@02028000 {
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reg = <0x02028000 0x4000>;
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interrupts = <0 46 0x04>;
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clocks = <&clks IMX6SL_CLK_SSI1>;
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dmas = <&sdma 37 22 0>,
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<&sdma 38 22 0>;
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dmas = <&sdma 37 1 0>,
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<&sdma 38 1 0>;
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dma-names = "rx", "tx";
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fsl,fifo-depth = <15>;
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status = "disabled";
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@ -211,8 +211,8 @@ ssi2: ssi@0202c000 {
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reg = <0x0202c000 0x4000>;
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interrupts = <0 47 0x04>;
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clocks = <&clks IMX6SL_CLK_SSI2>;
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dmas = <&sdma 41 22 0>,
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<&sdma 42 22 0>;
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dmas = <&sdma 41 1 0>,
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<&sdma 42 1 0>;
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dma-names = "rx", "tx";
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fsl,fifo-depth = <15>;
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status = "disabled";
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@ -223,8 +223,8 @@ ssi3: ssi@02030000 {
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reg = <0x02030000 0x4000>;
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interrupts = <0 48 0x04>;
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clocks = <&clks IMX6SL_CLK_SSI3>;
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dmas = <&sdma 45 22 0>,
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<&sdma 46 22 0>;
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dmas = <&sdma 45 1 0>,
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<&sdma 46 1 0>;
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dma-names = "rx", "tx";
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fsl,fifo-depth = <15>;
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status = "disabled";
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