net: dsa: mv88e6xxx: Add serdes register read/write helper

Add a helper for accessing SERDES registers of the 6390 family.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Andrew Lunn 2018-08-09 15:38:43 +02:00 committed by David S. Miller
parent 23ef57d823
commit e6891c76dd
2 changed files with 25 additions and 11 deletions

View File

@ -35,6 +35,22 @@ static int mv88e6352_serdes_write(struct mv88e6xxx_chip *chip, int reg,
reg, val); reg, val);
} }
static int mv88e6390_serdes_read(struct mv88e6xxx_chip *chip,
int lane, int device, int reg, u16 *val)
{
int reg_c45 = MII_ADDR_C45 | device << 16 | reg;
return mv88e6xxx_phy_read(chip, lane, reg_c45, val);
}
static int mv88e6390_serdes_write(struct mv88e6xxx_chip *chip,
int lane, int device, int reg, u16 val)
{
int reg_c45 = MII_ADDR_C45 | device << 16 | reg;
return mv88e6xxx_phy_write(chip, lane, reg_c45, val);
}
static int mv88e6352_serdes_power_set(struct mv88e6xxx_chip *chip, bool on) static int mv88e6352_serdes_power_set(struct mv88e6xxx_chip *chip, bool on)
{ {
u16 val, new_val; u16 val, new_val;
@ -298,12 +314,11 @@ static int mv88e6390_serdes_power_10g(struct mv88e6xxx_chip *chip, int lane,
bool on) bool on)
{ {
u16 val, new_val; u16 val, new_val;
int reg_c45;
int err; int err;
reg_c45 = MII_ADDR_C45 | MV88E6390_SERDES_DEVICE | err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
MV88E6390_PCS_CONTROL_1; MV88E6390_PCS_CONTROL_1, &val);
err = mv88e6xxx_phy_read(chip, lane, reg_c45, &val);
if (err) if (err)
return err; return err;
@ -315,7 +330,8 @@ static int mv88e6390_serdes_power_10g(struct mv88e6xxx_chip *chip, int lane,
new_val = val | MV88E6390_PCS_CONTROL_1_PDOWN; new_val = val | MV88E6390_PCS_CONTROL_1_PDOWN;
if (val != new_val) if (val != new_val)
err = mv88e6xxx_phy_write(chip, lane, reg_c45, new_val); err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
MV88E6390_PCS_CONTROL_1, new_val);
return err; return err;
} }
@ -325,12 +341,10 @@ static int mv88e6390_serdes_power_sgmii(struct mv88e6xxx_chip *chip, int lane,
bool on) bool on)
{ {
u16 val, new_val; u16 val, new_val;
int reg_c45;
int err; int err;
reg_c45 = MII_ADDR_C45 | MV88E6390_SERDES_DEVICE | err = mv88e6390_serdes_read(chip, lane, MDIO_MMD_PHYXS,
MV88E6390_SGMII_CONTROL; MV88E6390_SGMII_CONTROL, &val);
err = mv88e6xxx_phy_read(chip, lane, reg_c45, &val);
if (err) if (err)
return err; return err;
@ -342,7 +356,8 @@ static int mv88e6390_serdes_power_sgmii(struct mv88e6xxx_chip *chip, int lane,
new_val = val | MV88E6390_SGMII_CONTROL_PDOWN; new_val = val | MV88E6390_SGMII_CONTROL_PDOWN;
if (val != new_val) if (val != new_val)
err = mv88e6xxx_phy_write(chip, lane, reg_c45, new_val); err = mv88e6390_serdes_write(chip, lane, MDIO_MMD_PHYXS,
MV88E6390_SGMII_CONTROL, new_val);
return err; return err;
} }

View File

@ -29,7 +29,6 @@
#define MV88E6390_PORT10_LANE1 0x15 #define MV88E6390_PORT10_LANE1 0x15
#define MV88E6390_PORT10_LANE2 0x16 #define MV88E6390_PORT10_LANE2 0x16
#define MV88E6390_PORT10_LANE3 0x17 #define MV88E6390_PORT10_LANE3 0x17
#define MV88E6390_SERDES_DEVICE (4 << 16)
/* 10GBASE-R and 10GBASE-X4/X2 */ /* 10GBASE-R and 10GBASE-X4/X2 */
#define MV88E6390_PCS_CONTROL_1 0x1000 #define MV88E6390_PCS_CONTROL_1 0x1000