mtd: nand: sunxi: improve ->cmd_ctrl() function
Try to pack address and command cycles into a single NAND controller command to avoid polling the status register for each single change on the NAND bus. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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@ -238,6 +238,10 @@ struct sunxi_nand_chip {
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u32 timing_cfg;
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u32 timing_ctl;
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int selected;
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int addr_cycles;
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u32 addr[2];
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int cmd_cycles;
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u8 cmd[2];
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int nsels;
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struct sunxi_nand_chip_sel sels[0];
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};
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@ -525,17 +529,49 @@ static void sunxi_nfc_cmd_ctrl(struct mtd_info *mtd, int dat,
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writel(tmp, nfc->regs + NFC_REG_CTL);
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}
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if (dat == NAND_CMD_NONE)
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return;
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if (dat == NAND_CMD_NONE && (ctrl & NAND_NCE) &&
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!(ctrl & (NAND_CLE | NAND_ALE))) {
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u32 cmd = 0;
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if (ctrl & NAND_CLE) {
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writel(NFC_SEND_CMD1 | dat, nfc->regs + NFC_REG_CMD);
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} else {
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writel(dat, nfc->regs + NFC_REG_ADDR_LOW);
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writel(NFC_SEND_ADR, nfc->regs + NFC_REG_CMD);
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if (!sunxi_nand->addr_cycles && !sunxi_nand->cmd_cycles)
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return;
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if (sunxi_nand->cmd_cycles--)
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cmd |= NFC_SEND_CMD1 | sunxi_nand->cmd[0];
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if (sunxi_nand->cmd_cycles--) {
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cmd |= NFC_SEND_CMD2;
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writel(sunxi_nand->cmd[1],
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nfc->regs + NFC_REG_RCMD_SET);
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}
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sunxi_nand->cmd_cycles = 0;
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if (sunxi_nand->addr_cycles) {
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cmd |= NFC_SEND_ADR |
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NFC_ADR_NUM(sunxi_nand->addr_cycles);
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writel(sunxi_nand->addr[0],
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nfc->regs + NFC_REG_ADDR_LOW);
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}
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if (sunxi_nand->addr_cycles > 4)
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writel(sunxi_nand->addr[1],
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nfc->regs + NFC_REG_ADDR_HIGH);
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writel(cmd, nfc->regs + NFC_REG_CMD);
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sunxi_nand->addr[0] = 0;
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sunxi_nand->addr[1] = 0;
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sunxi_nand->addr_cycles = 0;
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sunxi_nfc_wait_int(nfc, NFC_CMD_INT_FLAG, 0);
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}
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sunxi_nfc_wait_int(nfc, NFC_CMD_INT_FLAG, 0);
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if (ctrl & NAND_CLE) {
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sunxi_nand->cmd[sunxi_nand->cmd_cycles++] = dat;
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} else if (ctrl & NAND_ALE) {
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sunxi_nand->addr[sunxi_nand->addr_cycles / 4] |=
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dat << ((sunxi_nand->addr_cycles % 4) * 8);
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sunxi_nand->addr_cycles++;
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}
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}
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/* These seed values have been extracted from Allwinner's BSP */
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