KVM: x86: drop TSC offsetting kvm_x86_ops to fix KVM_GET/SET_CLOCK
Since commita545ab6a00
("kvm: x86: add tsc_offset field to struct kvm_vcpu_arch", 2016-09-07) the offset between host and L1 TSC is cached and need not be fished out of the VMCS or VMCB. This means that we can implement adjust_tsc_offset_guest and read_l1_tsc entirely in generic code. The simplification is particularly significant for VMX code, where vmx->nested.vmcs01_tsc_offset was duplicating what is now in vcpu->arch.tsc_offset. Therefore the vmcs01_tsc_offset can be dropped completely. More importantly, this fixes KVM_GET_CLOCK/KVM_SET_CLOCK which, after commit108b249c45
("KVM: x86: introduce get_kvmclock_ns", 2016-09-01) called read_l1_tsc while the VMCS was not loaded. It thus returned bogus values on Intel CPUs. Fixes:108b249c45
Reported-by: Roman Kagan <rkagan@virtuozzo.com> Reviewed-by: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
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bd768e1466
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@ -948,7 +948,6 @@ struct kvm_x86_ops {
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int (*get_lpage_level)(void);
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bool (*rdtscp_supported)(void);
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bool (*invpcid_supported)(void);
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void (*adjust_tsc_offset_guest)(struct kvm_vcpu *vcpu, s64 adjustment);
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void (*set_tdp_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
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@ -958,8 +957,6 @@ struct kvm_x86_ops {
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void (*write_tsc_offset)(struct kvm_vcpu *vcpu, u64 offset);
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u64 (*read_l1_tsc)(struct kvm_vcpu *vcpu, u64 host_tsc);
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void (*get_exit_info)(struct kvm_vcpu *vcpu, u64 *info1, u64 *info2);
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int (*check_intercept)(struct kvm_vcpu *vcpu,
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@ -1138,21 +1138,6 @@ static void svm_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
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mark_dirty(svm->vmcb, VMCB_INTERCEPTS);
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}
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static void svm_adjust_tsc_offset_guest(struct kvm_vcpu *vcpu, s64 adjustment)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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svm->vmcb->control.tsc_offset += adjustment;
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if (is_guest_mode(vcpu))
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svm->nested.hsave->control.tsc_offset += adjustment;
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else
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trace_kvm_write_tsc_offset(vcpu->vcpu_id,
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svm->vmcb->control.tsc_offset - adjustment,
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svm->vmcb->control.tsc_offset);
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mark_dirty(svm->vmcb, VMCB_INTERCEPTS);
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}
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static void avic_init_vmcb(struct vcpu_svm *svm)
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{
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struct vmcb *vmcb = svm->vmcb;
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@ -3449,12 +3434,6 @@ static int cr8_write_interception(struct vcpu_svm *svm)
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return 0;
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}
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static u64 svm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
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{
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struct vmcb *vmcb = get_host_vmcb(to_svm(vcpu));
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return vmcb->control.tsc_offset + host_tsc;
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}
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static int svm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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@ -5422,8 +5401,6 @@ static struct kvm_x86_ops svm_x86_ops __ro_after_init = {
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.has_wbinvd_exit = svm_has_wbinvd_exit,
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.write_tsc_offset = svm_write_tsc_offset,
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.adjust_tsc_offset_guest = svm_adjust_tsc_offset_guest,
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.read_l1_tsc = svm_read_l1_tsc,
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.set_tdp_cr3 = set_tdp_cr3,
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@ -421,7 +421,6 @@ struct nested_vmx {
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/* vmcs02_list cache of VMCSs recently used to run L2 guests */
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struct list_head vmcs02_pool;
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int vmcs02_num;
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u64 vmcs01_tsc_offset;
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bool change_vmcs01_virtual_x2apic_mode;
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/* L2 must run next, and mustn't decide to exit to L1. */
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bool nested_run_pending;
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@ -2604,20 +2603,6 @@ static u64 guest_read_tsc(struct kvm_vcpu *vcpu)
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return kvm_scale_tsc(vcpu, host_tsc) + tsc_offset;
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}
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/*
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* Like guest_read_tsc, but always returns L1's notion of the timestamp
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* counter, even if a nested guest (L2) is currently running.
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*/
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static u64 vmx_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
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{
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u64 tsc_offset;
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tsc_offset = is_guest_mode(vcpu) ?
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to_vmx(vcpu)->nested.vmcs01_tsc_offset :
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vmcs_read64(TSC_OFFSET);
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return host_tsc + tsc_offset;
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}
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/*
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* writes 'offset' into guest's timestamp counter offset register
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*/
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@ -2631,7 +2616,6 @@ static void vmx_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
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* to the newly set TSC to get L2's TSC.
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*/
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struct vmcs12 *vmcs12;
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to_vmx(vcpu)->nested.vmcs01_tsc_offset = offset;
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/* recalculate vmcs02.TSC_OFFSET: */
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vmcs12 = get_vmcs12(vcpu);
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vmcs_write64(TSC_OFFSET, offset +
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@ -2644,19 +2628,6 @@ static void vmx_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
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}
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}
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static void vmx_adjust_tsc_offset_guest(struct kvm_vcpu *vcpu, s64 adjustment)
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{
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u64 offset = vmcs_read64(TSC_OFFSET);
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vmcs_write64(TSC_OFFSET, offset + adjustment);
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if (is_guest_mode(vcpu)) {
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/* Even when running L2, the adjustment needs to apply to L1 */
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to_vmx(vcpu)->nested.vmcs01_tsc_offset += adjustment;
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} else
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trace_kvm_write_tsc_offset(vcpu->vcpu_id, offset,
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offset + adjustment);
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}
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static bool guest_cpuid_has_vmx(struct kvm_vcpu *vcpu)
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{
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struct kvm_cpuid_entry2 *best = kvm_find_cpuid_entry(vcpu, 1, 0);
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@ -10061,9 +10032,9 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
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if (vmcs12->cpu_based_vm_exec_control & CPU_BASED_USE_TSC_OFFSETING)
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vmcs_write64(TSC_OFFSET,
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vmx->nested.vmcs01_tsc_offset + vmcs12->tsc_offset);
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vcpu->arch.tsc_offset + vmcs12->tsc_offset);
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else
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vmcs_write64(TSC_OFFSET, vmx->nested.vmcs01_tsc_offset);
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vmcs_write64(TSC_OFFSET, vcpu->arch.tsc_offset);
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if (kvm_has_tsc_control)
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decache_tsc_multiplier(vmx);
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@ -10293,8 +10264,6 @@ static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch)
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enter_guest_mode(vcpu);
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vmx->nested.vmcs01_tsc_offset = vmcs_read64(TSC_OFFSET);
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if (!(vmcs12->vm_entry_controls & VM_ENTRY_LOAD_DEBUG_CONTROLS))
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vmx->nested.vmcs01_debugctl = vmcs_read64(GUEST_IA32_DEBUGCTL);
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@ -10818,7 +10787,7 @@ static void nested_vmx_vmexit(struct kvm_vcpu *vcpu, u32 exit_reason,
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load_vmcs12_host_state(vcpu, vmcs12);
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/* Update any VMCS fields that might have changed while L2 ran */
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vmcs_write64(TSC_OFFSET, vmx->nested.vmcs01_tsc_offset);
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vmcs_write64(TSC_OFFSET, vcpu->arch.tsc_offset);
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if (vmx->hv_deadline_tsc == -1)
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vmcs_clear_bits(PIN_BASED_VM_EXEC_CONTROL,
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PIN_BASED_VMX_PREEMPTION_TIMER);
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@ -11339,8 +11308,6 @@ static struct kvm_x86_ops vmx_x86_ops __ro_after_init = {
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.has_wbinvd_exit = cpu_has_vmx_wbinvd_exit,
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.write_tsc_offset = vmx_write_tsc_offset,
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.adjust_tsc_offset_guest = vmx_adjust_tsc_offset_guest,
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.read_l1_tsc = vmx_read_l1_tsc,
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.set_tdp_cr3 = vmx_set_cr3,
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@ -1409,7 +1409,7 @@ static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
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u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
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{
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return kvm_x86_ops->read_l1_tsc(vcpu, kvm_scale_tsc(vcpu, host_tsc));
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return vcpu->arch.tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
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}
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EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
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@ -1547,7 +1547,7 @@ EXPORT_SYMBOL_GPL(kvm_write_tsc);
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static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
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s64 adjustment)
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{
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kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
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kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
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}
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static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
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@ -1555,7 +1555,7 @@ static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
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if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
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WARN_ON(adjustment < 0);
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adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
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kvm_x86_ops->adjust_tsc_offset_guest(vcpu, adjustment);
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adjust_tsc_offset_guest(vcpu, adjustment);
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}
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#ifdef CONFIG_X86_64
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