This pull request contains Broadcom ARM-based SoC changes for 4.9, please pull
the following: - Rafal adds preliminary support for the new BCM53573 Wi-Fi SoC based on a single core Cortex A7 and re-using a bunch of iProc peripherals - Florian adds support for earlyprintk on Broadcom STB/CM ARM-based chips by reading the chip family_id value from a known location and deriving the UART based address -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXz3EeAAoJEIfQlpxEBwcEhOMQAIR2/o8vsxo58mH2DD9Zx6b7 DuIqw5w7zL85bKeSm8o9puhmF9MyVeNDeAaWgO5Ck1pKw2pycm2K4bOsfHCYlijS I+U85MnwZC9Gnr59UiGXFrhA4cpQ1Vd03s2FqMYhjGxD+05Xn/RK6aCPJGwcsnsE QAonT40RU/uR05a7XBLY/DT0jLxYrDib9xInkImtPmcjaQuuercsFfjL+Fx0/EhO JnY4Xw5KeJGZEwu4mpoLkupbzm7wCTP2vSoqXMMHEwPP79GLXVolqIAErIV9mcBr hSLbtng6LG5xfZ1Z70VtNRYfEOYl8jkik/F7R2VcR0JmJtATr//Yy7oN8JxmsCc5 494VrsThlgO0F8r8l7VpNi9qz3Yb1N31OHS/v5ZswyWzqvjYB6oOE8L4Z4MKZjec kEuYQPbvjKNsGX960B3LYcE8qe8TPF3ih+5E/UoNAkO5yYj6Q5G4H9WJSx0gSQYw q7lXlsKE+W39Mw0Pztp+HExcaJAudDJ6gy617HEw1+ZDQEpQAGG4Lipge6/hAVbA kDvoIIle2RLLlydibf1qz1PQKFqDXscWNcvaRd2wYTX+xIE4i26JiWMYboPLXXz1 VXkiPRB3agGGtzKuq2elOc1zOPPEosdud5JhQlW632qy6rkIoVy0bSMTivfO2rBO /z71QLuHPWjjTISNrBud =8KXa -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-4.9/soc' of http://github.com/Broadcom/stblinux into next/soc Pull "Broadcom soc changes for 4.9" from Florian Fainelli: This pull request contains Broadcom ARM-based SoC changes for 4.9, please pull the following: - Rafal adds preliminary support for the new BCM53573 Wi-Fi SoC based on a single core Cortex A7 and re-using a bunch of iProc peripherals - Florian adds support for earlyprintk on Broadcom STB/CM ARM-based chips by reading the chip family_id value from a known location and deriving the UART based address * tag 'arm-soc/for-4.9/soc' of http://github.com/Broadcom/stblinux: ARM: BCM53573: Initial support for Broadcom BCM53573 SoCs ARM: brcmstb: Add earlyprintk support using run-time checks
This commit is contained in:
Arnd Bergmann
commit
ea58e97d66
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@ -2574,6 +2574,13 @@ F: arch/arm/mach-bcm/bcm_5301x.c
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F: arch/arm/boot/dts/bcm5301x*.dtsi
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F: arch/arm/boot/dts/bcm470*
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BROADCOM BCM53573 ARM ARCHITECTURE
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M: Rafał Miłecki <rafal@milecki.pl>
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L: linux-arm-kernel@lists.infradead.org
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S: Maintained
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F: arch/arm/boot/dts/bcm53573*
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F: arch/arm/boot/dts/bcm47189*
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BROADCOM BCM63XX ARM ARCHITECTURE
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M: Florian Fainelli <f.fainelli@gmail.com>
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M: bcm-kernel-feedback-list@broadcom.com
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@ -186,10 +186,11 @@ choice
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config DEBUG_BRCMSTB_UART
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bool "Use BRCMSTB UART for low-level debug"
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depends on ARCH_BRCMSTB
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select DEBUG_UART_8250
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help
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Say Y here if you want the debug print routines to direct
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their output to the first serial port on these devices.
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their output to the first serial port on these devices. The
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UART physical and virtual address is automatically provided
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based on the chip identification register value.
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If you have a Broadcom STB chip and would like early print
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messages to appear over the UART, select this option.
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@ -1430,6 +1431,7 @@ config DEBUG_LL_INCLUDE
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default "debug/zynq.S" if DEBUG_ZYNQ_UART0 || DEBUG_ZYNQ_UART1
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default "debug/bcm63xx.S" if DEBUG_BCM63XX_UART
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default "debug/digicolor.S" if DEBUG_DIGICOLOR_UA0
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default "debug/brcmstb.S" if DEBUG_BRCMSTB_UART
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default "mach/debug-macro.S"
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# Compatibility options for PL01x
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@ -1520,7 +1522,6 @@ config DEBUG_UART_PHYS
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default 0xe6e60000 if DEBUG_RCAR_GEN2_SCIF0
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default 0xe8008000 if DEBUG_R7S72100_SCIF2
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default 0xf0000be0 if ARCH_EBSA110
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default 0xf040ab00 if DEBUG_BRCMSTB_UART
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default 0xf1012000 if DEBUG_MVEBU_UART0_ALTERNATE
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default 0xf1012100 if DEBUG_MVEBU_UART1_ALTERNATE
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default 0xf7fc9000 if DEBUG_BERLIN_UART
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@ -1604,7 +1605,6 @@ config DEBUG_UART_VIRT
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default 0xfb009000 if DEBUG_REALVIEW_STD_PORT
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default 0xfb00c000 if DEBUG_AT91_SAMA5D4_USART3
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default 0xfb10c000 if DEBUG_REALVIEW_PB1176_PORT
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default 0xfc40ab00 if DEBUG_BRCMSTB_UART
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default 0xfc705000 if DEBUG_ZTE_ZX
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default 0xfcfe8600 if DEBUG_BCM63XX_UART
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default 0xfd000000 if DEBUG_SPEAR3XX || DEBUG_SPEAR13XX
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@ -1677,8 +1677,7 @@ config DEBUG_UART_8250_WORD
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DEBUG_ALPINE_UART0 || \
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DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \
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DEBUG_DAVINCI_DA8XX_UART2 || \
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DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2 || \
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DEBUG_BRCMSTB_UART
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DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2
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config DEBUG_UART_8250_PALMCHIP
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bool "8250 UART is Palmchip BK-310x"
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@ -1697,7 +1696,8 @@ config DEBUG_UNCOMPRESS
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bool
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depends on ARCH_MULTIPLATFORM || PLAT_SAMSUNG || ARM_SINGLE_ARMV7M
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default y if DEBUG_LL && !DEBUG_OMAP2PLUS_UART && \
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(!DEBUG_TEGRA_UART || !ZBOOT_ROM)
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(!DEBUG_TEGRA_UART || !ZBOOT_ROM) && \
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!DEBUG_BRCMSTB_UART
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help
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This option influences the normal decompressor output for
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multiplatform kernels. Normally, multiplatform kernels disable
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@ -0,0 +1,145 @@
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/*
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* Copyright (C) 2016 Broadcom
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation version 2.
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*
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* This program is distributed "as is" WITHOUT ANY WARRANTY of any
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* kind, whether express or implied; without even the implied warranty
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/serial_reg.h>
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/* Physical register offset and virtual register offset */
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#define REG_PHYS_BASE 0xf0000000
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#define REG_VIRT_BASE 0xfc000000
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#define REG_PHYS_ADDR(x) ((x) + REG_PHYS_BASE)
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/* Product id can be read from here */
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#define SUN_TOP_CTRL_BASE REG_PHYS_ADDR(0x404000)
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#define UARTA_3390 REG_PHYS_ADDR(0x40a900)
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#define UARTA_7250 REG_PHYS_ADDR(0x40b400)
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#define UARTA_7268 REG_PHYS_ADDR(0x40c000)
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#define UARTA_7271 UARTA_7268
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#define UARTA_7364 REG_PHYS_ADDR(0x40b000)
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#define UARTA_7366 UARTA_7364
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#define UARTA_74371 REG_PHYS_ADDR(0x406b00)
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#define UARTA_7439 REG_PHYS_ADDR(0x40a900)
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#define UARTA_7445 REG_PHYS_ADDR(0x40ab00)
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#define UART_SHIFT 2
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#define checkuart(rp, rv, family_id, family) \
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/* Load family id */ \
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ldr rp, =family_id ; \
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/* Compare SUN_TOP_CTRL value against it */ \
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cmp rp, rv ; \
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/* Passed test, load address */ \
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ldreq rp, =UARTA_##family ; \
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/* Jump to save UART address */ \
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beq 91f
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.macro addruart, rp, rv, tmp
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adr \rp, 99f @ actual addr of 99f
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ldr \rv, [\rp] @ linked addr is stored there
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sub \rv, \rv, \rp @ offset between the two
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ldr \rp, [\rp, #4] @ linked brcmstb_uart_config
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sub \tmp, \rp, \rv @ actual brcmstb_uart_config
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ldr \rp, [\tmp] @ Load brcmstb_uart_config
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cmp \rp, #1 @ needs initialization?
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bne 100f @ no; go load the addresses
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mov \rv, #0 @ yes; record init is done
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str \rv, [\tmp]
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/* Check SUN_TOP_CTRL base */
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ldr \rp, =SUN_TOP_CTRL_BASE @ load SUN_TOP_CTRL PA
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ldr \rv, [\rp, #0] @ get register contents
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and \rv, \rv, #0xffffff00 @ strip revision bits [7:0]
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/* Chip specific detection starts here */
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20: checkuart(\rp, \rv, 0x33900000, 3390)
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21: checkuart(\rp, \rv, 0x72500000, 7250)
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22: checkuart(\rp, \rv, 0x72680000, 7268)
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23: checkuart(\rp, \rv, 0x72710000, 7271)
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24: checkuart(\rp, \rv, 0x73640000, 7364)
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25: checkuart(\rp, \rv, 0x73660000, 7366)
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26: checkuart(\rp, \rv, 0x07437100, 74371)
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27: checkuart(\rp, \rv, 0x74390000, 7439)
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28: checkuart(\rp, \rv, 0x74450000, 7445)
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/* No valid UART found */
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90: mov \rp, #0
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/* fall through */
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/* Record whichever UART we chose */
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91: str \rp, [\tmp, #4] @ Store in brcmstb_uart_phys
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cmp \rp, #0 @ Valid UART address?
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bne 92f @ Yes, go process it
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str \rp, [\tmp, #8] @ Store 0 in brcmstb_uart_virt
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b 100f @ Done
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92: and \rv, \rp, #0xffffff @ offset within 16MB section
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add \rv, \rv, #REG_VIRT_BASE
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str \rv, [\tmp, #8] @ Store in brcmstb_uart_virt
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b 100f
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.align
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99: .word .
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.word brcmstb_uart_config
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.ltorg
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/* Load previously selected UART address */
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100: ldr \rp, [\tmp, #4] @ Load brcmstb_uart_phys
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ldr \rv, [\tmp, #8] @ Load brcmstb_uart_virt
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.endm
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.macro store, rd, rx:vararg
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str \rd, \rx
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.endm
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.macro load, rd, rx:vararg
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ldr \rd, \rx
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.endm
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.macro senduart,rd,rx
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store \rd, [\rx, #UART_TX << UART_SHIFT]
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.endm
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.macro busyuart,rd,rx
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1002: load \rd, [\rx, #UART_LSR << UART_SHIFT]
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and \rd, \rd, #UART_LSR_TEMT | UART_LSR_THRE
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teq \rd, #UART_LSR_TEMT | UART_LSR_THRE
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bne 1002b
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.endm
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.macro waituart,rd,rx
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.endm
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/*
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* Storage for the state maintained by the macros above.
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*
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* In the kernel proper, this data is located in arch/arm/mach-bcm/brcmstb.c.
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* That's because this header is included from multiple files, and we only
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* want a single copy of the data. In particular, the UART probing code above
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* assumes it's running using physical addresses. This is true when this file
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* is included from head.o, but not when included from debug.o. So we need
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* to share the probe results between the two copies, rather than having
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* to re-run the probing again later.
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*
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* In the decompressor, we put the symbol/storage right here, since common.c
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* isn't included in the decompressor build. This symbol gets put in .text
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* even though it's really data, since .data is discarded from the
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* decompressor. Luckily, .text is writeable in the decompressor, unless
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* CONFIG_ZBOOT_ROM. That dependency is handled in arch/arm/Kconfig.debug.
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*/
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#if defined(ZIMAGE)
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brcmstb_uart_config:
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/* Debug UART initialization required */
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.word 1
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/* Debug UART physical address */
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.word 0
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/* Debug UART virtual address */
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.word 0
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#endif
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@ -159,6 +159,20 @@ config ARCH_BCM2835
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This enables support for the Broadcom BCM2835 and BCM2836 SoCs.
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This SoC is used in the Raspberry Pi and Roku 2 devices.
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config ARCH_BCM_53573
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bool "Broadcom BCM53573 SoC series support"
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depends on ARCH_MULTI_V7
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select ARCH_BCM_IPROC
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select HAVE_ARM_ARCH_TIMER
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help
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BCM53573 series is set of SoCs using ARM Cortex-A7 CPUs with wireless
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embedded in the chipset.
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This SoC line is mostly used in home routers and is some cheaper
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alternative for Northstar family.
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The base chip is BCM53573 and there are some packaging modifications
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like BCM47189 and BCM47452.
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config ARCH_BCM_63XX
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bool "Broadcom BCM63xx DSL SoC"
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depends on ARCH_MULTI_V7
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@ -19,6 +19,22 @@
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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/*
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* Storage for debug-macro.S's state.
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*
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* This must be in .data not .bss so that it gets initialized each time the
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* kernel is loaded. The data is declared here rather than debug-macro.S so
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* that multiple inclusions of debug-macro.S point at the same data.
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*/
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u32 brcmstb_uart_config[3] = {
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/* Debug UART initialization required */
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1,
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/* Debug UART physical address */
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0,
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/* Debug UART virtual address */
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0,
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};
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static void __init brcmstb_init_irq(void)
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{
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irqchip_init();
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